Leveraging Its Customer-Proven Technology and Accepted Industry Standards, Summit Proactively Addresses the Growing Demand for Better IP Selection and Integration
LOS ALTOS, Calif.--July 7, 2006--Summit Design, Inc., a leading provider of electronic system-level (ESL) and hardware description language (HDL) design solutions, today announced the launch of its Intellectual Property (IP) Initiative designed to proactively address IP interoperability issues at the system-level. Through this initiative, Summit will 1) proactively work with IP vendors to build and distribute a library of transaction-level IP models that are pre-tested to work together, and 2) further equip these IP models for system-level design analysis, debugging, architectural exploration, and performance analysis.
Effective SoC design requires high levels of IP assembly and reuse. However, there is a profusion of disparate TLM methodologies causing interoperability issues to persist. IP Vendors support a variety of operating systems (OS) flavors or versions; such as GNU and Visual C++. They also support multiple simulation environments, such as the OSCI simulator, various proprietary simulators, mixed-language simulators, etc. This eclectic mix only further complicates the customers' interoperability issues and forces them to bear the costly and time-consuming burden of getting IP to work within their system chips. OSCI is continuing to enhance the TLM standard. Working with IP vendors, Summit will further the support of this evolving standard while addressing the interoperability issues not yet addressed.
Under its IP Initiative, Summit will work with IP partners to address these interoperability issues and to define, drive, and provide a library of SystemC transaction-level models (TLM). Summit will leverage the open source common infrastructures, including the Open SystemC Initiative (OSCI) reference simulator, and its OSCI TLM standard, the Open Core Protocol International Partnership (OCP-IP) TLM bus interface standard, and the GNU C Compiler. Through Summit's initiative, partner IP will be enhanced to support of advanced analysis, debugging, and design management features using Summit's Vista(TM) and Visual Elite(TM), and annotated with calls for architecture exploration, component selection, parameterization, and virtual product management (VPM) using Summit's Panorama(TM). Summit will also distribute and perform first-level support for this library of components tailored to work together with enhanced capabilities.
"Our customers have told us that it takes them upwards of 2-3 man-months for a complex IP block to resolve interoperability problems," said Emil Girczyc, Summit's president and CEO. "We were resolving issues at customer sites together with IP vendors when we recognized the tremendous need for reliable vendor-supplied high-level models. We understood that what was really needed was an IP initiative that could solve these problems proactively, as opposed to at the customer site. By working with IP vendors, we can fully enable advanced features and enhance interoperability between IP vendors."
Summit's IP Initiative benefits customers by focusing on addressing IP interoperability issues. It will deliver considerable value to customers by enabling IP to be shipped in a standard model selection platform using Panorama. Customers will also be able to appropriately configure the IP, do architectural exploration and performance analysis, and benefit from advanced debugging features which would be made available within the IP of each initiative partner. Summit's IP Initiative will accelerate refinement and support for a TLM modeling standard, and availability of golden models from the IP vendor. Ultimately, the Initiative makes it possible for the IP of all the Initiative partners to work together, serving to accelerate system-level IP adoption.
Demonstrations of Vista, Visual Elite, and Panorama will be provided on July 24-27, 2006, in Summit Design's booth #1028 at the Design Automation Conference (DAC) located within the Moscone Convention Center in San Francisco, California. Summit will also highlight the benefits of its IP Initiative at demonstrations held at the Summit Design booth. To book time with Summit's ESL and HDL experts, please call +1-650-564-0010 ext. 810 or email firstname.lastname@example.org to request a private demo.
To learn more about Summit's IP initiative, register to attend the 4th annual DAC ESL technology symposium hosted by Summit Design, "Putting ESL to Work: Successful IP Selection, Integration, and Interoperability for Effective ESL Design". The symposium is being held at the Moscone Convention Center, in room 200 on Tuesday, July 25, 12:00 - 2:00 p.m. Registration is available at http://www.sd.com/news_events/events/.
About Summit Design
Summit Design's industry-leading ESL and HDL solutions enable SOC companies to deliver products that meet system-level performance and power targets with dramatically reduced schedule risk. Summit's products address engineering challenges met during the specification and implementation design phases of complex hardware/software systems. Panorama(TM) allows designers to perform real-time application emulation of both the hardware and software portions of an embedded SoC, before core and IP selections are finalized. Vista(TM) is an integrated development environment (IDE) for SystemC that combines both hardware and software concepts to speed design and debug of SystemC and TLM applications. Visual Elite(TM) is a state-of-the-art design, integration and verification platform which enables designers to intuitively capture and validate their designs using high-level design techniques and languages. Top electronics companies worldwide, including leaders in the wireless, automotive, and consumer electronics space, have achieved dramatic reductions in design cycle time through their use of Summit's products. Summit Design is headquartered in Los Altos, California, with offices throughout the US, Europe, Japan, Israel, and ROA. To learn more, please visit http://www.sd.com.