Denali PCI Express Core Used as Drop-in Solution for High Performance Cswitch Chip
PALO ALTO, Calif., July 10, 2006 -- Denali and Cswitch today announced the results of a collaborative effort to deploy Denali's Databahn™ PCI Express core on Cswitch's Configurable Switch Array chip. The companies successfully integrated the Databahn PCI Express (PCIe) core, configured as a 4 lane endpoint device running at 10Gbps, into the Configurable Switch Array chip. The integrated solution is targeted for a 90nm process, and will be demonstrated during the technology preview of Cswitch's new chip architecture at the 43rd Design Automation Conference (DAC) in San Francisco starting July 24. More information about DAC is available at: http://www.dac.com
"Denali has been a great partner to work with in the development of our high performance network application that we plan to demonstrate at the upcoming DAC event," said Ed McKernan, VP of Business Development at Cswitch Corporation. "Denali has definitely lived up to their reputation as experts in design and verification IP solutions for PCI Express. Denali will be a key partner for enabling our customers to efficiently deploy PCI Express on their designs."
"Cswitch's new Configurable Switch Architecture offers the highest performing solution in the network infrastructure market and our Databahn PCIe core plays a key role in completing the platform for network equipment customers," said David Lin, GM of PCI Express products for Denali. "Our partnership enables customers to have all the features and capabilities to quickly build and ship a completely configurable networking platform without using high cost ASICs."
Founded in 2003, Cswitch is a privately held semiconductor company based in Santa Clara, CA. Cswitch develops high performing configurable solutions for the networking, storage, wireless base station and telecom markets and plans to release its first product later in 2006. For more information on Cswitch Corporation, visit: www.cswitch.com
Databahn PCI Express IP Products
Databahn PCIe IP is a dual-link, dual-mode core which can be configured as a single link supporting x1, x2, x4, or x8 operations, or as dual-links which can be independently configured for x1, x2, or x4 operation. In the single link mode, the core may be configured as a PCIe Endpoint (EP) or Root Complex (RC). In the dual-link mode, both links may be configured as EP's, or one of the links may be configured as a RC, and the other as an EP. At the physical layer, the core supports a standard PIPE-compatible interface, with an 8 or 16-bit data width per lane. At the transaction layer, the core provides a 64-bit data interface.
Databahn PCIe product supports the PCIe 1.1 standard, as well as preliminary PCIe 2.0 specifications. Deliverables include synthesizable RTL, scripts for synthesis and static timing analysis, layout guidelines, compliance tests, complete documentation, and is verified using Denali PureSpec™ verification IP and Denali PureSuite™ compliance suites. Databahn IP is library independent and covers solutions from 180nm to 45nm technologies. More information about Databahn is available online at: http://www.denali.com/databahn
Other Databahn IP Products
Databahn memory controllers are silicon proven in more 65 chips, spanning 18 process nodes, and support a wide range of device architectures, including the latest SDRAM, DDR1, DDR2, DDR3, Mobile-DDR DRAM devices, NAND, and OneNAND flash devices. More information about Databahn is available online at: http://www.denali.com/databahn
Denali Software Inc. is the world's leading provider of Electronic Design Automation (EDA) and Intellectual Property (IP) products for design and verification of semiconductor chip interfaces. Its Databahn™ products provide optimal control and data throughput for PCI Express, and DRAM and Flash memory devices. Spectra™ is a fully featured flash file system for NAND and NOR memory systems. PureSpec™ and MMAV™ verification IP support all standard interfaces, including DRAM, Flash, PCI Express, USB, Ethernet, Serial ATA, CE-ATA, AXI, and PLB. Denali's Blueprint™ SystemRDL compiler provides a complete solution for on-chip register specification and management. For more information, visit Denali at http://www.denali.com, call (650) 461-7200 or email firstname.lastname@example.org.