Databahn DDR2 Controllers Used in Vega 2 Processor, The World's First and Only 48 Core Chip Design
PALO ALTO, Calif., July 12, 2006 -- Denali today announced that Azul Systems, the pioneer of the first network attached processing solution, has successfully implemented Denali's Databahn™ DDR2 memory controller in its new Vega™ 2 processor chip.
Designed by Azul and fabricated by Taiwan Semiconductor Manufacturing Company (TSMC) in an advanced 90 nanometer (nm) process, the Azul Vega 2 is the world's first and only single-chip 64-bit processor which contains 48 cache-coherent processor cores. The 812-million transistor chip will act as the foundation for the company's upcoming second-generation line of compute appliances, designed to deliver compute and memory resources as a shared network service for transaction-intensive applications in enterprise computing environments.
Chip designers at Azul Systems implemented Denali's Databahn memory controller intellectual property (IP) in the Vega 2 chip to control the external DDR2-SDRAM memory devices. Azul also used Denali's MMAV™ memory modeling product to simulate the interaction between the Vega 2 chip and the external DDR2 devices to ensure correct and optimal performance early in the design process before the chip was fabricated.
"Vega 2 is a very high performance processor, and the memory system is a critical element of the architecture required to sustain the levels of performance we have been able to achieve," said Scott Sellers, chief operating officer and co-founder at Azul Systems. "We use a sophisticated design and verification flow for our chip development, and by working with Denali, we were able to deploy the memory controller IP, utilize their memory simulation environment, and ultimately meet our aggressive development targets with a high-quality product."
"Azul is clearly pushing the cutting edge of design with their Vega 2 chip," added Brian Gardner, vice president of IP products for Denali. "Integrating 48 processor cores on a single chip is not a trivial task. Configurable DDR memory controller IP is no trivial task either. Being able to configure our Databahn memory controller IP to support a high-performance application like Azul's is a testament to the quality of our own IP design teams, and to the architecture of our IP configuration engine. We are very pleased with the success of Azul's chips, and we look forward to participating in more successful chip designs with them."
About Databahn IP Products
Licensed for use in more than 170 chip designs, Databahn is the industry's leading DDR memory controller IP solution. Databahn IP cores offer configurability and programmability to deliver optimal performance from DRAM and Flash memory for a wide range of end applications. To ensure compatibility with all the latest high-speed memory technologies, the Databahn IP configuration process is tightly integrated with Denali's database of vendor-specific memory component specifications, including all the latest SDRAM, DDR1, DDR2, DDR3, GDDR3, and Mobile-DDR DRAM devices, as well as NAND, NOR and OneNAND flash devices. Databahn is silicon proven in more than 65 chips, spanning 18 process nodes. More information about Databahn is available online at: http://www.denali.com/databahn
Denali Software Inc. is the world's leading provider of Electronic Design Automation (EDA) and Intellectual Property (IP) products for design and verification of semiconductor chip interfaces. Its Databahn™ products provide optimal control and data throughput for PCI Express, and DRAM and Flash memory devices. Spectra™ is a fully featured flash file system for NAND and NOR memory systems. PureSpec™ and MMAV™ verification IP support all standard interfaces, including DRAM, Flash, PCI Express, USB, Ethernet, Serial ATA, CE-ATA, AXI, and PLB. Denali's Blueprint™ SystemRDL compiler provides a complete solution for on-chip register specification and management. For more information, visit Denali at http://www.denali.com, call (650) 461-7200 or email email@example.com.
About Azul Systems
Azul Systems, Inc. has pioneered the industry's first network attached processing solution, designed to unbound compute resources for transaction-intensive applications and services, such as those based on the Java™ platform or Microsoft® .NET™ framework. Without application level modifications, binary compatibility requirements or operating system dependencies, this fundamentally new approach eliminates the need to capacity plan at the application level and dramatically lowers the cost and complexity associated with the traditional delivery of computing resources. More information on Azul Systems can be found at www.azulsystems.com.