Integrated flow proven to deliver better timing, area and turnaround time for structured ASIC designs
SANTA CLARA, Calif., July 21, 2006 ––Magma® Design Automation Inc. (Nasdaq: LAVA), a provider of semiconductor design software, today announced that STMicroelectronics (NYSE: STM) has successfully implemented a via-programmable embedded structured ASIC platform using Magma’s Blast Create™ SA. The embedded block was implemented in a 110-nanometer (nm) process and will be used to customize functions in multifunction printer applications. With the Magma software’s integrated implementation and excellent correlation with STMicroelectronics’ sign-off capabilities, STMicroelectronics was able to meet tight timing, area and schedule constraints. As a result of this success, STMicroelectronics is now adopting the Magma flow for all the customizations of its SpearTM Head 200 configurable SoC.
”To meet the demands of the printer market, we need to perform customizations of our configurable SoC in an efficient manner and with a fast turnaround, key factors in this market,” said Loris Valenti, design director, Computer Peripherals Group, STMicroelectronics. “We used the Magma system because it offered several critical capabilities. Blast Create SA’s structure-specific timing optimization allowed us to manage the mapping of the RTL into the programmable logic cells, enabling us to fully leverage the structured ASIC fabric embedded in our SpearTM product, achieve timing and minimize area. Leveraging the ST/Magma design flow for standard-cell designs, we were able to correlate results to our existing sign-off tools quickly and easily.”
“We’re very pleased to work with ST on advanced techniques to achieve aggressive design goals while drastically reducing the cost and cycle time for derivative IC products,” said Kam Kittrell general manager of Magma’s Design Implementation Business Unit. “The method of mixing metal-programmable logic arrays with conventional standard-cell design is increasingly being used for many high-volume applications. Addressing the challenges of this hybrid approach within our RTL-to-silicon implementation system reduces the time to market for the first device and future revisions.”
STMicroelectronics’ Application-Specific Structured ASIC
SPEArTM Head is a member of the SpearTM family of customizable SoCs. It integrates an advanced ARM926EJ-S core running at 266 MHz, a complete set of IP (intellectual property) blocks and a configurable logic block that allows an incomparable level of flexibility in high-complexity system implementation. The new device makes it possible to achieve extremely fast customization of critical functions in a fraction of the time and cost required by a full-custom design approach. The device is provided with a development board and Linux SW drivers allowing testing of the system very early in the development process.
SPEAr by ST™ family addresses a variety of applications, including digital engines for printers, scanners and other embedded control applications
Magma’s Integrated Structured ASIC Support
Structured ASIC vendors offer designers a set of embedded cores or devices with specific, customizable metal layers along with predefined metal layers, which can contain the underlying pattern of logic cells, memory and I/O (input/output). By virtue of the predefined structures, the ASIC vendors drastically reduce risky and time-consuming tasks because test, signal integrity and IR drop are accounted for in the architecture. The programmable layers are often limited to a last few metal layers or a single via to further reduce cost and turnaround time.
With Blast Create SA, Magma combines ASIC-proven synthesis capabilities with structure-specific optimizations to deliver superior QoR and a highly predictable flow. Blast Create SA creates a structured ASIC floorplan of logic array and physical data to guide the entire implementation process. Unlike traditional logic synthesis tools, Blast Create SA maps directly to structured ASIC complex logic elements and on-chip hierarchical resources. Blast Create SA includes advanced physical synthesis technology that handles complex and specific physical site constraints created by structured ASIC architectures. Blast Create SA’s heterogeneous placement simultaneously places complex standard-cell instances and variable-width hard IP macros such as embedded memory blocks to achieve an optimal solution. The Blast Create SA routing-aware placement utilizes on-chip limited buffer and dedicated driver cells to meet design timing constraints prior to detailed routing. Blast Create SA physical synthesis also handles complex clocking constraints of structured ASIC pre-routed clock and power networks to take advantage of on-chip low-skew resources.
Magma is a leading provider of software for semiconductor design. The world’s top chip companies use Magma’s EDA products to design and verify complex, high-performance integrated circuits (ICs) for communications, computing, consumer electronics and networking applications, while at the same time reducing design time and costs. Magma provides software for IC implementation, analysis, physical verification, characterization and programmable logic design, and the company’s integrated RTL-to-GDSII design flow offers “The Fastest Path from RTL to Silicon”TM. Magma is headquartered in Santa Clara, Calif. with offices around the world. The company’s stock trades on Nasdaq under the ticker symbol LAVA. Visit Magma Design Automation on the Web at www.magma-da.com.