Joint project results in verification solution for multi voltage power management
SAN JOSE, CA AND CAMBRIDGE, UK – July 24, 2006 – ARM [(LSE:ARM); (Nasdaq:ARMHY)] and ArchPro, today announced success in a joint R&D project to validate advanced multi-voltage power management design techniques. Employing ARM® Intelligent Energy Manager (IEM™) technology and validated with ArchPro’s Multi-Voltage Simulator Tool (MVSIM) resulted in an EDA tool for pre-tapeout verification of power-managed designs. The project produced working 65-nanometer (nm) silicon for a complex reference system-on-chip (SoC) design jointly verified by the two companies. The SoC used an ARM processor with IEM technology demonstrating a number of active and sleep modes, to vary power and performance.
“MVSIM has proven its ability to verify sophisticated voltage schemes prior to tapeout and it is a verification solution applicable to a variety of multi-voltage schemes, including adaptive voltage scaling, power gating, and back bias”, said John Goodenough, director, Design Technology, ARM “We expect the ARM Partner community can benefit by leveraging this work as a reference.”
IEM technology-based IP is viewed as an industry-leading power-management solution. IEM technology-based IP can save users up to 60 percent battery life using adaptive clock frequency and voltage scaling. MVSIM enables IEM technology-based IP users to verify sophisticated voltage control schemes before tapeout. To validate MVSIM’s capabilities, the two companies successfully collaborated on the verification of a reference 65nm SoC design using an ARM processor and the ARM Intelligent Energy Controller (IEC).
MVSIM enables users to make system-level architectural decisions at RTL related to multi-voltage techniques including dynamic voltage scaling, power gating, and back bias. MVSIM works with mainstream simulators like ModelSim, NC-Sim, and VCS enabling users to verify multi-voltage designs at the RTL level. There is no restriction on how the islands are organized. MVSIM supports any arbitrary partition in the hierarchy, including nested islands and domains.
“Multi-voltage chip designers have settled for verification of power management after the silicon has been created,” said Pratap Reddy, ArchPro chairman and CEO. “ARM IEM technology-based IP leads in offering multi-voltage design, and together we help the SoC design community realize significant power savings without risk to functional silicon. With MVSIM, users can easily perform verification prior to silicon spins with no change to their existing flows.”
ArchPro will be a first-time exhibitor at DAC this July, Booth 2014. ArchPro provides EDA products to meet low-power and multi-voltage design challenges facing 90/65nm SoC designers. Having launched many of the world’s first EDA products for power-managed, multi-voltage, low-power design environments that allow for design simulation, verification and implementation prior to silicon spins, ArchPro is paving the way toward reducing cost, risk, and time to market for chip designers. Products support all major complementary IC / SoC design technologies. Privately held ArchPro is based in San Jose, Calif. www.archpro-da.com.
ARM designs the technology that lies at the heart of advanced digital products, from mobile, home and enterprise solutions to embedded and emerging applications. ARM’s comprehensive product offering includes 16/32-bit RISC microprocessors, data engines, 3D processors, digital libraries, embedded memories, peripherals, software and development tools, as well as analog functions and high-speed connectivity products. Combined with the company’s broad Partner community, they provide a total system solution that offers a fast, reliable path to market for leading electronics companies. More information on ARM is available at http://www.arm.com.