Dual Port Register File Compiler (1 Read-Only Port, 1 Write-Only Port)
ARM Introduces ARM922T[tm] Core
ARM Introduces ARM922T[tm] Core
CAMBRIDGE, UK - July 26, 2000 -- ARM [(LSE:ARM); (Nasdaq:ARMHY), the industry's leading provider of 16/32-bit embedded RISC processor solutions, today introduced the ARM922T[tm] core, a new member of the ARM9[tm] Thumb® family of microprocessor cores.
The ARM922T core offers designers a high-performance architecture for price & power sensitive portable applications running MP3 audio, Java, Voice recognition and MPEG-4 video. The ARM922T solution is a 32-bit microprocessor macrocell that combines the ARM9TDMI[tm] CPU core with 8k instruction and 8k data caches, instruction and data Memory Management Units (MMUs), a write buffer, an AMBA[tm] bus interface and an Embedded Trace Macrocell (ETM) interface. The core targets applications that require an optimal mix of performance and power, and provides an ideal solution for applications running industry-proven operating systems such as EPOC, Linux and WindowsCE.
The ARM922T core is backward compatible with the ARM7[tm] Thumb® and StrongARM® families, and upward compatible to the ARM9E[tm] Thumb and ARM10[tm] Thumb family, giving designers software-compatible processors with a range of price/performance points up to 500 MIPS. The core is supported by ARM's development tools and real-time debug solution, and the Multi-ICE[tm] debug interface.
The ARM922T core will be licensed as an intellectual property (IP) core for implementation within an application specific integrated circuit (ASIC) or application specific standard product (ASSP) design.
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