English
Multi-Processor SoCs: Where are the Tools?
By Ann Steffora Mutschler -- Electronic News, 8/25/2006
Electronic News sat down with Simon Davidmann, president and CEO of Imperas Inc.; Chris Rowen, founder, president and CEO of Tensilica Inc.; Ian Mackintosh, president of the OCP/IP Association; Jeff Jussel, VP marketing and Americas general manager at Celoxica Ltd.; and Tom Grebinski, founder and chairman of Oasis Tooling to talk about multi-processor system-on-chips, including how good current tools are for creating them, as well as what the industry needs to move forward. What follows are excerpts of the discussion.
Electronic News sat down with Simon Davidmann, president and CEO of Imperas Inc.; Chris Rowen, founder, president and CEO of Tensilica Inc.; Ian Mackintosh, president of the OCP/IP Association; Jeff Jussel, VP marketing and Americas general manager at Celoxica Ltd.; and Tom Grebinski, founder and chairman of Oasis Tooling to talk about multi-processor system-on-chips, including how good current tools are for creating them, as well as what the industry needs to move forward. What follows are excerpts of the discussion.
Related News
- Cradle Technologies, a fabless semiconductor company, Releases Multi-Processor Development Tools
- Silicon Hive announces HiveFlex VSP 2500 World's first fully-programmable multi-processor solution for Full High Definition (1080p) video codecs
- Teldix Selects Actel's ProASIC Plus FPGAs for Multi-Processor Boards Used in the Eurofighter Project
- Accelerated Technology Announces Nucleus IPC for Rapid Development of Multi-Processor Applications
- Lauterbach Debugger Delivers Multi-Processor Support for Altera's Nios II Embedded Processor
Breaking News
- Alphawave Semi Opens Pune Office, Continues Expansion into India
- SynSense closes USD$10m Pre-B+round to bring their ultra-low-power vision processing SOC "Speck™" to mass production
- Global Fab Equipment Spending on Track for 2024 Recovery After 2023 Slowdown, SEMI Reports
- OPENEDGES Completes the Tapeout of the 7nm HBM3 Memory Subsystem (PHY & Memory Controller) Test chip
- Andes Custom Extension™ (ACE) Supports AndesCore™ 45-Series Processors to Provide Flexible Acceleration
Most Popular
- OPENEDGES Completes the Tapeout of the 7nm HBM3 Memory Subsystem (PHY & Memory Controller) Test chip
- SoftBank and EdgeCortix Partner to Jointly Realize Low-latency and Highly Energy-efficient 5G Wireless Accelerators
- Andes Custom Extension™ (ACE) Supports AndesCore™ 45-Series Processors to Provide Flexible Acceleration
- CEO Interview: Ian Lankshear, EnSilica
- Renesas to Acquire Panthronics to Extend Connectivity Portfolio with Near-Field Communication Technology
|
E-mail This Article | 
|
|
Printer-Friendly Page |