Globetech Solutions Announces STIL Verifier, Shortest Path between Verification and Test
Based on the IEEE 1450 Standard Test Interface Language (STIL) standard, STIL Verifier can produce or validate complete test programs, allowing engineers to automate tedious and error prone transitions to and from Automated Test Equipment (ATE) environments. STIL Verifier comprises two flows: STIL Simulate™ parses, validates and imports STIL programs into simulation-based verification environments. STIL Capture™ records and exports complete verification scenarios, trivializing functional test program generation and speeding up silicon debug flows.
STIL Verifier interfaces to popular IEEE standard verification languages such as ‘e’ and SystemVerilog, allowing for early incorporation of STIL in the design process and co-verification of STIL with RTL, design netlists and embedded test structures.
“Testability is a key DFM challenge facing the entire semiconductor ecosystem”, said Stylianos Diamantidis, Managing Director and CTO of Globetech Solutions. “STIL Verifier makes working with STIL faster and easier, facilitating collaboration between test and verification experts and contributing directly to reduced time-to-volume.”
Availability
STIL Verifier is currently available for ‘e’ environments. SystemVerilog support will be available later in Q4 2006. Visit http://www.globetechsolutions.com/products/stil for a FREE 30-day evaluation.
About Globetech Solutions
Globetech Solutions is a premier provider of standards-based verification and test intellectual property products and electronic design automation solutions. Globetech addresses key challenges in electronic system level design from specification to volume production and field support. Customers, including some of the world’s largest IDMs, design IP suppliers and systems manufacturers, use Globetech’s products and services to increase quality, control predictability, and improve productivity. For further information, please visit www.globetechsolutions.com.
|
Globetech Solutions Hot Verification IP
Related News
- Globetech Solutions' Verification IP for Latest IEEE Test and Debug Standard Selected by STMicroelectronics
- Imperas releases new updates, test suites, and functional coverage library to support the rapid growth in RISC-V Verification
- Breker Verification Systems Unveils System Coherency Synthesis TrekApp Building on Its Successful Cache Coherency Test Solution
- Imperas Donates Latest RV32/64K Crypto (scalar) Architectural Validation Test Suites to the RISC-V Verification Ecosystem
- Tessolve strengthens its VLSI Design services with the acquisition of T&VS
Breaking News
- Cadence Announces Most Comprehensive True Hybrid Cloud Solution to Provide Seamless Data Access and Management
- Dolphin Design expands GoAsic partnership to enhance the semiconductor Industry's Supply Chain
- Cadence Collaborates with MemVerge to Increase Resiliency and Cost-Optimization of Long-Running High-Memory EDA Jobs on AWS Spot Instances
- M31 Successfully Validates 5nm IP Solution to Empower Global AI Applications
- Cadence Unveils Palladium Z3 and Protium X3 Systems to Usher in a New Era of Accelerated Verification, Software Development and Digital Twins
Most Popular
- Rivos Raises More Than $250M Targeting Data Analytics and Generative AI Markets
- Semiconductor Capacity Is Up, But Mind the Talent Gap
- Zhuhai Chuangfeixin: OTP IP Based on 90nm CMOS Image Sensor Process Technology Successfully Mass Production
- CMC Microsystems and AIoT Canada Sign Memorandum of Understanding to support IoT and semiconductor ecosystem growth in Canada
- Microchip Technology Acquires Neuronix AI Labs
E-mail This Article | Printer-Friendly Page |