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PhySim system debugs hardware, not models
PhySim system debugs hardware, not models
By Michael Santarini, EE Times
July 5, 2000 (11:52 a.m. EST)
URL: http://www.eetimes.com/story/OEG20000705S0013
SAN MATEO, Calif. Tiny startup Digital Design Solutions Inc. has announced the PhySim low-cost hardware-based debugging system that works in concert with VHDL and Verilog simulation tools. PhySim lets users drop their desired chip or pc-board into the system, set up an I/O configuration file and then connect the system to Model Technology's ModelSim dual VHDL/Verilog simulator to run the chip or board in concert with the blocks being simulated. Mark Elliott, founder and chief technical officer of Digital Design Solutions (San Diego), said the PhySim technology of his four-person company stems from a solution he developed while working as design consultant. "I was testing a processor with an ASIC and had to spend $20,000 for a hardware model that didn't work in all situations, soaked up memory and ran slow," said Elliott. "So I ended up creating this hardware-based system, and it eliminated a bunch of unknowns. Anyplace you can use a hardware model, you can use real hardware instead." Elliot and his coworkers commercialized PhySim in the belief that most designers share their hatred of building or purchasing hardware models, Elliot said. Other abilities The system has other uses beyond serving as a replacement for software behavioral models. At the chip level, Elliott said, engineers can use the system to test a ROM's program execution, test a new interface to an existing chip or duplicate the response of a circuit to verify proper activity. At the board level, engineers can use the system to combine chips virtually rather than use a pc-board; to characterize the operation of an existing circuit; or to test a new interface design with an existing processor/controller assembly. Elliott said PhySim is also a low-cost alternative to other commercial hardware-based debug systems. "High-end solutions usually cost a lot and require a tremendous effort to set up," he said. "PhyS im runs under $10,000, is easy to set up, and can do 80 or 90 percent of your circuits." He said the system uses a static clock input that saves time in configuration. Circuits can't be simulated at full speed but are still simulated faster than with hardware models. Elliott said the first PhySim has 96 I/O pins and four clock signals that are used to integrate any chip, board or system into an HDL simulation environment. Though the introductory system is limited to 96 programmable I/O pins, engineers can cascade any number of PhySim units for more power, Elliot said. The company is working on PhySim versions that will have 400 or more programmable I/O pins and that can also be cascaded for greater power, Elliot said. Follow-on systems are expected to sell for less than $10,000. Digital Design Solutions said that PhySim is currently being used to test microprocessors, and can easily integrate with any synchronous digital circuit, regardless of complexity. The initial version of PhySim sup ports the Model Technology VHDL/Verilog simulator running on a PC platform, but support for other simulation environments and platforms is expected soon.
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