Databahn PCIe IP Core and NXP PHY Provide Prime Combination for Next-Generation PCI Express ASIC Designs
PALO ALTO, Calif., EINDHOVEN, the Netherlands; February 7, 2007 —Denali Software, Inc., a world-leading provider of electronic design automation (EDA) software and intellectual property (IP), and NXP, the independent semiconductor company founded by Philips, today announced that the Databahn™ PCI Express (PCIe) IP core and NXP PCIe PHY PX1011A provide customers a silicon-proven PCIe solution which is version 1.1 specification compliant. This interoperable combination gives ASIC engineers increased confidence that the design IP and PHY works with any PCIe-standard-based design.
"We are pleased to have certified NXP PCIe PHY PX1011A with Denali's PCIe core at the PCI-SIG, number 53 workshop and achieved full version 1.1 PCIe specification compliance," said Dhwani Vyas, general manager, Product Line Interface Products at NXP. "Denali and NXP together provide a hardware-proven, high-performance and a 100 percent version 1.1 PCIe compliant solution, which reduces the risks for our joint customers designing the next-generation PCIe ASIC products. The use of an external PHY as an ASIC companion chip, eases ASIC prototyping, provides a backup and an alternative risk-free solution to integrating the 2.5Gb/s mixed-signal PHY into the customer ASIC."
Denali's industry-leading PCIe products provide the highest quality solutions for minimizing the development risk and lowering overall system costs. As a result, ASIC developers can concentrate their attention on the differentiating aspects of their design and accelerate design time with highly configurable, reusable, low-cost IP building blocks to create innovative electronic systems.
"The Databahn PCI Express IP core, mated with the NXP PCIe PHY, was tested extensively using Catalyst's SpekChek™ PCIe Compliance Test Suite," stated John Wiedemeier, Product Marketing Manager, Catalyst Enterprises. "SpekChek, provides the industry's deepest post-silicon compliance coverage and better enables industry developers to confidently roll out new PCIe designs. Our congratulations to the Denali and NXP teams for passing the PCI Express compliance tests, and deploying a very high-quality IP solution."
Denali and NXP recently participated in the PCI-SIG 1.1 specification workshop in December and tested their IP and their PHY interface. PCI-SIG controls the specification and conducts regular compliance workshops to enable PCI Express vendors to run tests on their products and ensure interoperability. It sponsors testing sessions worldwide to confirm a given product's compliance with the latest version of the PCI specification and issues a "pass" or "fail" for each test performed. The PCI-SIG also maintains the integrator's list. To access the integrator's info, visit: www.pci-sig.org.
"Our customers depend on high-quality, proven and compliant solutions to minimize their risk and enable them to deliver successful products," said David Lin, vice president of product marketing for Denali Software. "Denali's industry-leading interoperable IP solutions are used in over 250 validated designs. Our unequalled IP portfolio, coupled with NXP's PHY, provides our mutual customers high-performance design and verification solutions that engineers use to deploy PCIe technology."
About Denali Software, Inc.
Denali Software, Inc. is a world-leading provider of electronic design automation (EDA) software and intellectual property (IP) for system-on-chip (SoC) design and verification. Denali delivers the industry’s most trusted solutions for deploying PCI Express, NAND and DRAM subsystems. Developers use Denali’s EDA, IP and services to reduce risk and speed time-to-market for electronic system and chip design. Denali is headquartered in Palo Alto, California and has offices around the world to serve the global electronics industry. More information about Denali, its products and services is available at http://www.denali.com.