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Linda Lavin (Aptix Corporation) (408) 428-6226
LeAnne Frank (KVO) (503) 221-7403
APTIX ANNOUNCES DOUBLING OF EMULATION SYSTEM CAPACITY
New "Double-Density" Prototyping Modules Raise System Explorer Capacity to Over 3 Million Gates
SAN JOSE, Calif. – May 29, 2000 – Aptix Corporation today announced the latest increase in emulation capacity for its that it is now offering a new prototyping module for its System Explorer product line. The company has developed a new prototyping module that which increases doubles the nominal capacity of the recently announced System Explorer MP4CF-based systems to 3.6 million ASIC gates plus 10 Mbits of block memory. This enables Aptix customers to emulate designs of 5-6 million gates in two simple desktop systems, or more with assistance from Aptix Consulting Engineers.
The same prototyping module may also be applied to the new System Explorer MP3CF for high performance emulation of pipelined- architecture SoC designs up to 2.7 million ASIC gates. This announcement comes just eight weeks after Aptix announced systems with a nominal capacity of 1.8 million ASIC gates.
"The release of these new prototyping modules with two Xilinx Virtex 2000E devices on each module demonstrates the real beauty flexibility of Aptix's patented, open architecture, which allowsenabling our customers to take advantage of the latest FPGAs to be employed as soon as they chips are become available,"", saidcommented Amr Mohsen, president and CEOceo of Aptix. "We have doubled system logic capacity by mounting two Xilinx Virtex 2000E devices on each module. By leveraging a new "optimization" feature in the recently introduced Expedition emulation software, our customers can make speed vs. capacity tradeoffs toand take advantage of populating our systems more densely with these new FPGA prototyping modules."
"We are pleased the partnership between Aptix and Xilinx continues to deliver more powerful solutions," said Bruce Weyer, senior director of high-end marketing at Xilinx. "This new ‘double density' module, which gives multi-million gate emulation capacity to the System Explorer product line, offers engineers a tool to verify a broader range of designs and to get them into production faster than in the past."
"Aptix can now offerdesktop emulation systems densities on a single desktop unit now offers a logic capacity rivaling those that of big, mainframe emulation systems,". , and wWith rapidly increasing densities of FPGAs, the rate of capacity increase sees no end in sight" said Leif Rosqvist, chief operating officer of Aptix. "With rapidly increasing densities of FPGAs, the rate of capacity increase sees no end in sight."". "The beauty of the Aptix approach, of prototyping the most complex SoC chips by plugging in daughter cards with FPGAs and bonded-out IP cores onto the reconfigurable emulation systems, allows enables Aptixus to easily upgrade system capacity to be easily upgraded simply by designing new daughter cards as new FPGAs are available."
About Aptix Corporation
Aptix Corporation's' products are used to verify system and system-on-chip (SOC) designs prior to integrated circuit (IC) and board tape-out and fabrication. . Aptix's products utilize the block-based verification methodology, which provides a mechanism to map and verify individual design blocks incrementally and in parallel with the design creation process. This methodology shortens the net prototype creation time toof achievinge real-world operation of the prototype to the few days required to map and verify the last RTL block designed. Debugging designs becomes simple because the mapping process is both under the user's interactive control and follows the natural hierarchy of the design. This also makes tracing design problems back to the source netlist an intuitive process.
The company is privately held and is headquartered at 2880 North First Street, San Jose, Calif. 95134. Telephone (408) 428-6200, Fax (408) 944-0646. Visit Aptix on the Web at: http://www.aptix.com.
Aptix products are used to verify system and system-on-chip (SOC) designs prior to ASIC and board tape-out. The System Explorer is a reprogrammable system for integration of software with custom logic, off-the-shelf components and hard or soft IP. Debugging the hardware portions of the design is performed with off-the-shelf logic analyzers. Software is debugged using in-circuit emulation capabilities. Typical circuits prototyped on the System Explorer product family operate at frequencies from 10 to 30 MHz, enabling real-time verification of many embedded applications. Individual design block, system I/O and bus speeds can be 50MHz or higher. The block-based verification methodology of the System Explorer product family provides a mechanism to map and verify individual design blocks incrementally and in parallel with the design creation process. This shortens the "net" prototype creation time to achieve real-world operation of the prototype to the few days required to map and verify the last RTL block designed. Debugging designs is simple because the mapping process is both under the users interactive control and follows the natural hierarchy of the design. This also makes tracing design problems back to the source netlist an intuitive process.
The company is privately held and is headquartered at 2880 North First Street, San Jose, Calif. 95134. Telephone (408) 428-6200, Fax (408) 944-0646. Web location:http://www.aptix.com
System Explorer and Expedition are trademarks of Aptix Corporation.
Virtex is a trademark of Xilinx Corporation.