ECS develops new technology to facilitate System-on-Chip
Professor Bashir Al-Hashimi and his team at the University’s School of Electronics & Computer Science (ECS) have developed NIRGAM (Network-on-Chip Interconnect RoutinG and Applications Modelling), a simulator which will make it possible to easily connect up the various cores which exist within a System-on-Chip (SoC).

'The microelectronics industry predicts that in 2008 SoCs will contain over 50 processing and memory blocks and this will increase to 100 cores in 2012,' he said.
This led to Professor Al-Hashimi and Professor Alex Yakovlev at the University of Newcastle securing funding from the Engineering and Physical Sciences Research Council (EPSRC) in 2005 to develop the next generation of interconnection technology for multiprocessor SoCs, from which NIRGAM has been developed.
‘The availability of such a simulator will be welcomed by the SoC and Network-on-Chip (NoC) research communities since it allows researchers to plug-in and experiment with different applications and routing algorithms using different traffic and topologies,’ said Professor Al-Hashimi. ‘The availability of such a simulator is vital for researchers since it will enable them to evaluate quickly their routing algorithms and applications on a NoC platform, and without the need to develop long programs.’
Related News
- Cadence Perspec System Verifier Delivers Up to 10X Productivity Improvement in System-on-Chip Verification
- SpringSoft's Siloti System Simplifies Visibility Automation and Debug Flow for System-on-Chip Verification
- Newport Media Unveils World's First 65nm System-on-Chip (SoC) for Japan/Brazilian ISDB-T Mobile TV
- STMicroelectronics Announces Complete Fully Integrated NFC (Near Field Communication) System-on-Chip
- Mindspeed Introduces Next-Generation Family of System-on-Chip Carrier Access VoIP Processors
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |