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Xilinx Delivers DDR2-400 Support for Spartan-3 Generation FPGAs with Hardware-Verified Reference Design
Free reference design enables designers of HDTV and other high-performance, high-volume applications to quickly implement 400 Mbps DDR2 SDRAM interfaces with FPGAs
SAN JOSE, Calif., August 7, 2007 – Xilinx, Inc. (NASDAQ:XLNX), the world’s leading supplier of programmable solutions, today announced support for a 400 Mbps DDR2 SDRAM interface (DDR2-400) with its proven low-cost 90 nm Spartan™-3A and Spartan™-3AN FPGAs. Designers can download a free hardware verified reference design providing quick implementation of a 400 Mbps DDR2 SDRAM interface. The reference design complements the company’s comprehensive suite of development kits and software tools offered to assist customers in memory interface implementations. DDR2 SDRAM interfaces are widely used in applications such as low-cost video and networking.
“The development of HDTV and its requirement for low-cost, high-memory bandwidth has created demand for high performance DDR2 memory interfaces. By providing a solution based on our high-volume Spartan-3A and Spartan-3AN FPGAs available now, designers can implement a variety of high-resolution video or graphic frame buffers,” said Oliver Garreau, senior manager of Applications Engineering, General Products Division at Xilinx. “Our customers can now leverage a fully-verified DDR2-400 reference design and low-cost development kits to move their design to production faster.”
The 400 Mbps DDR2 memory interface reference design, including data capture circuitry and memory controller, is fully verified in hardware using Xilinx® Spartan™-3A FPGA high speed grade (-5) devices. The hardware validation process was completed using a Spartan-3A FPGA Starter Kit board with (-5) devices which includes full characterization at different process corners, as well as temperature and voltage variations that meet commercial grade requirements.
Xilinx also offers a Memory Interface Generator (MIG) for ultimate design flexibility and ease-of-use. The MIG is a free, user-friendly parameterizable software tool designed to create memory interface designs in unencrypted RTL. MIG supports multiple memory architectures, device and package combinations that provide system designers with the flexibility to easily customize their own design. MIG is integrated in the Xilinx® CORE Generator™ software and provides RTL source and constraints files through a graphical interface for ultimate user flexibility.
Pricing and Availability
The free 400 Mbps DDR2 SDRAM interface reference design for Spartan-3A and Spartan-3AN FPGAs, including graphic demo files, is available for immediate download at www.xilinx.com/memory. Users can purchase low cost kits with out-of-the-box guarantee to get to market faster. Low cost Spartan-3A FPGA DDR2 SDRAM Interface Development Kit is immediately available for US$235 at http://www.xilinx.com/s3addr2. The Spartan-3AN Starter Kit that features DDR2 SDRAM interface support is available today for US$225. Visit www.xilinx.com/s3anstarter for more information.
About Xilinx Spartan-3 Generation FPGAs
Based on its industry leading performance and low price points, the Xilinx Spartan-3 generation has been broadly adopted in high-volume, consumer applications such as DVD players, plasma displays and HDTV. With the recent introduction of its Spartan-3A, Spartan-3AN and Spartan-3A DSP FPGA platforms, Xilinx continues to add new market-specific features to its low cost Spartan series FPGAs while reducing the cost by 30X since its introduction. Visit www.xilinx.com/spartan for more information.
Xilinx, Inc. is the worldwide leader of programmable logic solutions. For more information, visit www.xilinx.com.
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