SNOWBUSH microelectronics Announces Silicon Verified 6-Bit, 2.5 GSPS, ADC IP Core in 90nm CMOS Process
SNOWBUSH's 6-bit ADC is compact, low-power, and by utilizing its high bandwidth sample-and-hold front-end, it maintains excellent dynamic performance throughout the full range of input frequencies. The ADC features INL of 0.59 LSB, DNL of 0.51 LSB, and ENOB of 5.2 or greater for sampling clock frequencies up to 2.5 GHz. The ADC occupies a silicon area of 0.43 square millimeters.
"This ADC will enable product developers to reduce system costs by including the high performance converter they need in their next ASIC instead of using a more power hungry external component," said SNOWBUSH Vice President of Sales and Marketing, Paul Layman. "It is ideally suited for a variety of applications that require excellent matching between multiple ADC's, such as I-Q radios, and it doesn't require any expensive analog process options."
The state-of-the-art ADC utilizes automatic calibration of key analog blocks to ensure performance over variations in process, voltage, and temperature. The ADC features on-chip power-supply regulation for robust noise immunity within large digital SOC's. Several power-down modes are provided to minimize power consumption.
About SNOWBUSH microelectronics
SNOWBUSH microelectronics, a privately held company founded in 1998, is a leading supplier of analog design services and customizable high performance analog IP including a variety of silicon proven high speed SerDes. Combining a large pool of experienced design talent with leading edge analog design practices and best in class project management techniques, SNOWBUSH delivers the critical custom analog circuits needed to meet aggressive project schedules. Please contact SNOWBUSH sales by phone at +1-416-925-5643 x239 or on the World Wide Web at www.snowbush.com.
|
Related News
- SNOWBUSH microelectronics Announces 10-Bit, 140 MSPS, ADC IP Core in Foundry Standard 0.18 um CMOS Process
- City Semiconductor Announces Leading-Edge 12-bit 2.5-GSPS SAR ADC IP in 40nm
- Acacia Semiconductor Announces a New Family of Best-in-Class High-Speed 10-bit ADC IPs Silicon Proven in a 130nm Process
- SNOWBUSH microelectronics announces availability of silicon verified, 80nm, Line-Lock PLL IP Block
- CHIPIDEA Announces Silicon Validation of a Very Compact 90nm 10-bit /105MHz ADC
Breaking News
Most Popular
- BrainChip's Success in 2020 Advances Fields of On-Chip Learning and Ultra-Low Power Edge AI
- Global Semiconductor Sales Increase 13.2% year-to-year in January
- Wave Goodbye, Hello MIPS as Chapter 11 Resolved
- Metrics Announces an EDA as a Service Partnership Program with Semiconductor Intellectual Property Vendors
- proteanTecs Joins the TSMC IP Alliance Program
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |