Ottawa, Canada and Shenzhen, PRC -- Aug 24, 2007 -- Semiconductor IP vendor Sarance Technologies Inc. and HiSilicon Technologies Co Ltd. today announced a licensing agreement that will see HiSilicon license Sarance’s Interlaken Protocol IP core for use in HiSilicon FPGA and ASIC products.
Interlaken is a royalty-free specification detailing a high speed serial chip-to-chip interconnect technology that builds upon the logical structure of the System Packet Interface Level 4 (SPI4.2) specification which is widely used in current generation networking equipment. Interlaken, like SPI-4.2, provides multiple logical channels and per-channel back-pressure information, but unlike SPI-4.2, it can easily scale to data rates exceeding 100 Gbps using a low power serialization/de-serialization (SERDES) physical layer. Sarance’s Interlaken IP Core, which is fully compliant with the Interlaken Protocol Specification Revision 1.1, will enable HiSilicon to quickly bring cost-effective products to market offering chip-to-chip interconnect speeds in excess of 100 Gbps.
Sarance Technologies is an intellectual property development firm based in Ottawa, Ontario, Canada. Sarance offers a portfolio of ASIC and FPGA silicon cores targeted at vendors developing leading edge data communication solutions. For more information on Sarance’s Interlaken protocol IP cores, visit Interlaken on www.sarance.com.
Previously the ASIC Design Center of Huawei Technologies, HiSilicon Technologies Co., Ltd. was established as an independent company in October 2004. Headquartered in Shenzhen, China, HiSilicon has set up design centers in Beijing, Shanghai, Silicon Valley (USA) and Sweden. HiSilicon produces semiconductors for the communications networking, wireless terminal, and digital media markets.