The SH77650 provides the same image recognition functions as Renesas Technology's existing SH7774 (600 MHz operation) high-performance SoC product for car navigation systems. Developed as a dedicated image recognition processing LSI device, the new SoC product delivers a superior cost-performance through optimized functionality and performance. In addition, a reference platform that will enable efficient system development for customers is to be made available in December 2007.
The features of the SH77650 are as follows.
In recent years the automobile industry has been working to realize systems to help make driving saver, such as vehicle-to-vehicle distance detection and stay-in-lane assistance systems. This has brought increased demand for image recognition systems, which use data from vehicle-mounted cameras and perform image recognition of lane markings, leading vehicles, and the like, as a technology with the potential of making such capabilities a reality.
On the other hand, in the years ahead the role of vehicle information terminals as devices supporting safer and more convenient driving will become more important, in addition to their current role as devices for displaying maps and recreational content. Overall, these systems are expected to become more complex and sophisticated. This trend will increase the burden on system developers. The degree to which existing software resources can be utilized effectively and ways to shorten the time required to develop new functions will become ever more important issues.
Renesas Technology has contributed to the advancement of car navigation systems with products built around the SH-4 and SH-4A CPU cores, and the company has gained a substantial share of the market in the car navigation field. The new SH77650, an SoC for the automotive field, responds to the above-mentioned market demand by combining high-level image recognition processing functions alongside peripheral functions optimized for vehicle image processing systems.
Additional Product Details
The SH77650 incorporates the SH-4A, the top-end CPU core in the SuperH Family. Its processing performance is 540 MIPS at its maximum operating frequency of 300 MHz. The on-chip floating-point processing unit (FPU) also operates at a maximum of 300 MHz. The FPU supports single- and double-precision calculations, delivering a maximum operating performance of 2.1 GFLOPS in single-precision mode. This excellent processing performance makes it possible to realize powerful systems.
The SH77650 also incorporates many peripheral functions suitable for image recognition applications. In addition to a high-performance image recognition processing accelerator, there is a three-channel video input interface, a display function supporting a screen of maximum WVGA size (850 x 480-pixel), a dedicated six-channel DMA controller, three timer channels, a two-channel serial interface, and a two-channel CAN interface for in-vehicle LANs. This variety of on-chip peripheral functions covers the main tasks performed by in-vehicle image recognition systems.
In addition, there is an on-chip bus arbitrator circuit that sets the priority of attempts by the modules to access the bus. This circuit supports three access priority levels and makes it possible for multiple internal modules to access external memory efficiently. The priority levels can be changed by the user to meet requirements for CPU or image processing performance. In this way the maximum performance can be realized to match the system configuration and functions.
Furthermore, a 32-bit dedicated bus is provided as an external bus allowing connection to high-speed DDR1-SDRAM (Double Data Rate 1 - Synchronous DRAM), and a 32-bit expansion bus enables connection to flash memory or SRAM.
The package used is a 376-pin BGA (19 mm x 19 mm).
Available development tools include the E10A-USB emulator, which connects to a host PC via a USB bus. It also provides on-chip debugging functionality, allowing real-time debugging at the SH77650's maximum operating frequency.
There is also a reference platform available for system development by customers that offers the features listed below. The reference platform makes it possible to develop systems very efficiently.
| (1) | Includes in-vehicle information system oriented peripheral circuits, providing a user system actual-device verification environment. |
| (2) | Can be used as a software development tool for application software, etc. |
| (3) | Allows easy addition of original functions by the user. |
Renesas will continue to develop and release in a timely manner products offering enhanced performance, high-speed operation, and advanced functionality in response to evolving market needs.
* Other product names, company names, or brands mentioned are the property of their respective owners.Typical Applications
Vehicle information terminals: Image recognition equipment for in-vehicle navigation systems, peripheral devices to assist safe-driving, etc.
Industrial equipment: Entrance control systems employing image recognition, etc.
Prices in Japan
| Product Name | Package | Sample Price [Tax Included] (Yen) |
| SH77650(R8A77650DA01BPV) | 376-pin BGA | 6,000 |
Specifications
| Item | SH77650 Specifications |
| Product name | R8A77650DA01BPV |
| Power supply voltage | 1.2 V (internal)/3.3 V, 2.5 V (external) |
| Maximum operating frequency | 300 MHz |
| Maximum processing performance | 540 MIPS, 2.1 GFLOPS (at 300 MHz operation) |
| CPU core | SH-4A |
| On-chip RAM | 256 Kbytes (on-chip bus connection) + 16 Kbytes (CPU core internal connection) |
| Cache memory | 4-way set associative type, with separate 32 Kbytes for instructions and 32 Kbytes for data |
| External memory | Supports direct connection to DDR1-SDRAM (DDR200) via DDR1 dedicated bus. Expansion bus enables direct connection with SRAM or ROM. |
| Expansion bus | Address space: 64 Mbytes x 3 |
| Main peripheral functions | Video input interface x 3 channels |
| Display function (Display Unit) | |
| Image recognition processing accelerator | |
| Watchdog timer function | |
| Boot function | |
| Sound interface (SSI) x 4 channels | |
| Dedicated DMA controller (DMAC) x 6 channels | |
| Controller area network (RCAN) interface x 2 channels | |
| A/D converter x 1 channel [4 inputs] | |
| Serial communication interface (SCIF) x 2 channels | |
| Timer x 3 channels | |
| I 2 C bus x 2 channels | |
| Interrupt controller (INTC) | |
| Power-down modes | Sleep mode |
| Module standby mode | |
| DDR-SDRAM power supply backup mode | |
| Package | 376-pin BGA (19 mm x 19 mm)s |