Innoveda latches onto XML for design
Innoveda latches onto XML for design
By Chris Edwards, EE Times UK
April 24, 2000 (11:57 a.m. EST)
URL: http://www.eetimes.com/story/OEG20000424S0022
LONDON Innoveda Inc. will use the Extensible Markup Language (XML) to define storage of high-level design and constraints information for electronic systems. Innoveda (Marlboro Mass.), formed by Viewlogic's merger with Summit Design, is working with a "major" but undisclosed telecommunications company on the project. "It's a big project to develop XML as a common language for architectural and physical design information," said Will Herman, Innoveda president and chief executive officer. "It's not only higher level than approaches such as SystemC, it's broader too and offers a way of capturing constraints as well as design data that is not locked d own to one particular space, whether it is hardware or software," Herman said. The company will open up the specification for the XML schema-structures and tags that make up valid design elements if it gains enough support from customers. "You can't be successful owning a would-be standard. Our goal is to find a methodology, not to create the actual unifying language. XML certainly has the capability to act as a unifying language," said Herman. Herman does not see XML as the only language used in system modeling at a high level. He said there would be little point in converting existing Verilog or VHDL design files into their XML equivalents purely for co-simulation. Instead, tools will produce the XML descriptions to capture specs for modules yet to be implemented. "XML suffers in that it is very big and very slow. We can take a small subset of a chip in Verilog and describe it in XML, but it is 100 times larger. The chances are that we will see multiple languages," said Herman. At th is June's Design Automation Conference, Innoveda plans to roll out its first tools based on technology developed by Viewlogic and combined with Summit's existing Visual products. The tools will support system simulation using a mixture of C, C++ and SystemC. Chris Edwards is a contributing editor with Electronics Times, EE Times' sister publication in the U.K. Herman: 'Our goal is to find a methodology.'
Related News
- Alibaba Cloud Announced Progress in Porting Android Functions onto RISC-V
- Weebit undertakes capital raising to support accelerated growth; introduces major Israeli institutional investors onto the register
- Arteris IP Advances onto List of Top 15 Semiconductor IP Vendors
- Fujitsu Semiconductor Successfully Embeds Flash Memory onto DDC Technology
- Almalence Ports Optimized Image Processing Software onto Tensilica's New IVP Imaging/Video DSP
Breaking News
- Thalia's AMALIA 24.2 introduces pioneering estimated parasitics feature to reduce PEX iterations by at least 30%
- TSMC plans 1.6nm process for 2026
- Qualitas Semiconductor Partners with TUV Rheinland Korea to Enhance ISO 26262 Functional Safety Management System
- M31 has successfully launched MIPI C/D PHY Combo IP on the advanced TSMC 5nm process
- Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development
Most Popular
- Controversial former Arm China CEO founds RISC-V chip startup
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes
- Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
E-mail This Article | Printer-Friendly Page |