C++ and SystemC Models Provide Easily Controllable Secure Distribution Format For SystemC, C++, And RTL Environments
St. Albans, England -- October 1, 2007 -- ARC International today released the VTOC® 4.0 Toolset for creating 100 percent cycle accurate C++ and SystemC models from Verilog and VHDL RTL. VTOC 4.0 includes a new intelligent code analysis system that enables developers to generate C++ and SystemC models that are more efficient and achieve higher performance. These source code models accelerate the development of performance critical firmware such as device drivers and codecs and functional verification of this software within a complete SoC; a complete software suite can be developed and debugged before the target SoC sees first silicon. ARC IP eXchange, based on VTOC technology, enables IP vendors, semiconductor, and fabless companies to securely deliver C++ and SystemC models to software developers, partners and customers.
VTOC 4.0 continues a 5 year history of reducing system design costs, by shortening overall SoC development time and reducing re-spins due to functional errors. In June 2007, ARC International acquired the developers of VTOC, Tenison Design Automation, and since then has accelerated development of the next generation of products. VTOC 4.0 is now available for evaluation worldwide: email firstname.lastname@example.org.
Intelligent Code Analysis Engine Makes Model Creation Even Easier
Major functionality of the VTOC 4.0 Toolset’s a new intelligent code analysis system includes the following:
Reporting errors and potential errors in the RTL, with a diagnosis to help the design engineer fix the problem;
Identifying RTL that can cause bottlenecks in modeling, allowing hand-coded C++/SystemC models to be substituted using industry standard interfaces; and
Providing run-time analysis and feedback, so models can be tuned for optimal performance for a specific application.
With minimal effort the professional engineer is able to automatically create 100 percent cycle accurate models.
Builds on Existing VTOC Model Generation Technology
VTOC uses synthesis technology to create highly optimized, 100-percent cycle accurate source C++ and SystemC models that are at a higher level of abstraction than the original RTL. These models are ideal for:
Architectural exploration, enabling reuse of legacy RTL in SystemC based design tools.
Early software development and verification, using fast, 100-percent cycle accurate C++ models of the actual hardware, which, being source code, are easily integrated into software development environments. With guaranteed cycle accuracy they are ideal for development of performance critical firmware such as device drivers and codecs, and functional verification of that software within the complete SoC before first silicon is available.
IP distribution using ARC IP eXchange. IP eXchange is based on VTOC technology that enables intellectual property (IP) vendors, semiconductor and fabless companies to address the problem of safely delivering verification IP models. The models are compiled to binary and stripped of symbols to make a highly secure way of distributing IP in a platform independent fashion to partners or potential customers.
VTOC was developed at the University of Cambridge Computer Laboratory and first released in September 2002. Since then it has been used in the design of numerous SoCs (System on Chip) now in production by companies worldwide.
About ARC's Patented Configurable Technology
ARC's patented configurable processor technology enables SoC designers to create silicon that is optimized to the end application. Designers have the freedom to retain necessary functionality while removing unneeded features in a configurable ARC subsystem or processor. In addition, adding custom instructions to ARC's subsystems and cores, designers can achieve major gains in application efficiency by defining custom extensions that accelerate critical code. The benefit is a system-on-chip (SoC) with an optimal balance of speed, area, and power for a specific application, resulting in a lower power, smaller chip that is less expensive to manufacture.
VTOC 4.0 is extensively used within ARC and has been used to create fast, 100-percent cycle accurate models of the ARC 600 and ARC 700 series configurable processors as well as the recently introduced ARC® Video Subsystems based on the VRaptor Multicore Architecture.
ARC VTOC 4.0 is now available for licensing by companies worldwide. For more information or to evaluate VTOC, contact ARC International visit www.arc.com.
About ARC International plc
ARC International is the world leader in configurable media subsystems and CPU/DSP processors. Used by over 140 companies worldwide, ARC's configurable solutions enable the creation of highly differentiated system-on-chips (SoCs) that ship in hundreds of millions of devices annually. ARC's patented subsystems and cores are smaller, consume less power, and are less expensive to manufacture than competing products.