Peter Claydon, COO and co-founder, picoChip(10/15/2007 9:00 AM EDT) -- EE Times
It has been clear for some time that a law of diminishing returns applies to the advancement of conventional processor architectures. Each new process geometry and microarchitecture delivers successively less in terms of performance gains: It is simply no longer possible to deliver Moore's Law by going faster.
At Intel, they have encompassed this truth by complementing Moore's Law with Pollack's Rule, named after Fred Pollack, director of Intel's microprocessor research labs. Pollack has observed that each new Intel architecture, starting with the i386, has required two to three times the silicon area (in a comparable process), while delivering a 1.4 to 1.7 times improvement in performance. In short, performance increases in proportion to the square root of complexity. In two generations, performance doubles for a fourfold increase in complexity; a 4X increase in speed (six years of Moore's Law) requires 16 times more transistor.
Meanwhile, many believe they have also determined what will prove to be the limiting factor in terms of process shrinks: not lithography or quantum physics, but the enormous power densities inherent in doing a great deal of processing work in a very small physical space (notoriously, the power density in a core has passed that of an iron, and is nearing that of a rocket nozzle).
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