Small-size ISP (Image Signal Processing) IP ideal for AI camera systems.
Massana, Xemics team on low-power MCU-DSP core
Massana, Xemics team on low-power MCU-DSP core
By Michael Santarini, EE Times
April 17, 2000 (9:46 a.m. EST)
URL: http://www.eetimes.com/story/OEG20000417S0011
Belfast, Ireland-based core provider Massana Inc. has teamed up with fabless semiconductor vendor Xemics (Neuchatel, Switzerland) to offer a low-power, low-voltage solution combining Xemics' CoolRISC 8-bit RISC microprocessor and Massana's FILU-5016-bit fixed-point DSP coprocessor.
The new product, FILU-50/CoolRISC, targets small-footprint applications such as medical, sensors, motor control, handheld communicators and Internet-enabled portable appliances, said Ben O'Sullivan, business development manager at Massana.
O'Sullivan said that the core was not created at the request of one particular customer, but that after polling several customers the companies realized users would be very receptive to a low-power MCU-DSP combo core.
The core boasts performance of 4 Mips for the MPU and 2 Mips for the DSP, giving a combined total of 6 million instructions/second with a 1-volt supply. Massana's FILU-5016-bit is connected to Xemics' CoolRISC 8-bit RISC via an application programming interface. That means FILU-50/CoolRISC users will be able to develop their applications entirely in C using an API to invoke DSP functions, the company said.
CoolRISC call
Massana's DSP coprocessor core portion of the FILU-50/CoolRISC contains a set of preprogrammed DSP functions that are accessed through a C-language function call from the CoolRISC. Customers program the core with Xemics' CoolRide software package. The core package includes C and Verilog models, which engineers can use for system simulation. The two companies also offer an evaluation board to allow users to develop their own systems applications.
To find out more about FILU-50/CoolRISC, contact www.massana.com or www.xemics.com.
Related News
- Massana, XEMICS Partner To Offer A Combined RISC and DSP Core For Ultra Low-Power, Low-Voltage Applications
- Imagination and Andes collaborate to enable ultra-low power connected microprocessors for IoT
- Tensilica Announces Diamond Standard 330HiFi, a Low-Power 24-bit Audio DSP
- Lexra Announces Low-Power RISC-DSP CORE, Offering Better Performance at Lower Power than an ARM9E
- LeapMind's Ultra Low-Power AI accelerator IP "Efficiera" Achieved industry-leading power efficiency of 107.8 TOPS/W
Breaking News
- China's Intel, AMD Ban Helps Local Rivals, Analysts Say
- PUFsecurity Unveils Next-Gen Crypto Coprocessor PUFcc7 Featuring High-speed Performance and TLS 1.3 Support
- SEMIFIVE Starts Mass Production of its 14nm AI Inference SoC Platform based Product
- VeriSilicon's complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification
- TASKING and Andes Announce FuSa Compliant Compiler Support for Andes RISC-V ASIL Compliant Automotive IP
Most Popular
- Intel and Arm Team Up to Power Startups
- Chiplet Interconnect Pioneer Eliyan Closes $60 Million Series B Funding Round, Co-led by Samsung Catalyst Fund and Tiger Global Management to Address Most Pressing Challenge in Development of Generative AI Chips
- PUFsecurity Unveils Next-Gen Crypto Coprocessor PUFcc7 Featuring High-speed Performance and TLS 1.3 Support
- Renesas Introduces Industry's First General-Purpose 32-bit RISC-V MCUs with Internally Developed CPU Core
- SmartSoC Solutions Joins TSMC Design Center Alliance to Boost Semiconductor Innovation in India
E-mail This Article | Printer-Friendly Page |