English
Rockfish Technology Launches Interlaken Verification IP
PALO ALTO, Calif. -- October 22, 2007 -- Rockfish Technology today announced the release of its second generation Verification IP with the addition of the Interlaken Bus Functional Model (BFM). Interlaken is a new high speed chip-to-chip interconnect protocol developed jointly by Cisco Systems and Cortina Systems.
Rockfish Technology’s strategy to gain market share in the verification IP space is to offer attractive licensing terms. “Our goal is to provide our customers the maximum possible value by delivering the IP unencrypted and free of usage restrictions at an attractive price,” said Jason Jones, Founder Rockfish Technology. “Our customers may modify and use the IP freely as their own.”
The new Interlaken offering augments Rockfish Technology’s existing Ethernet SGMII and XAUI BFMs. The Ethernet BFMs offer a solution for the network line side of a device. Now Rockfish Technology’s offerings with the Interlaken BFM cover both the line side and device side of a networking ASSP.
The Interlaken BFM has an easy to use interface for the customer’s testbench consisting of a clocked data bus and control lines. Alternatively, Rockfish Technology offers a SystemVerilog packet based testbench for those customers needing a complete solution.
About Rockfish Technology
Rockfish Technology, an Electronic Design Automation (EDA) and design services company for the semiconductor industry, incorporated in 2005 in California. Rockfish Technology’s focus is providing the key IP and services to augment the customers functional verification effort and ensure the highest quality customer RTL.
Rockfish Technology’s strategy to gain market share in the verification IP space is to offer attractive licensing terms. “Our goal is to provide our customers the maximum possible value by delivering the IP unencrypted and free of usage restrictions at an attractive price,” said Jason Jones, Founder Rockfish Technology. “Our customers may modify and use the IP freely as their own.”
The new Interlaken offering augments Rockfish Technology’s existing Ethernet SGMII and XAUI BFMs. The Ethernet BFMs offer a solution for the network line side of a device. Now Rockfish Technology’s offerings with the Interlaken BFM cover both the line side and device side of a networking ASSP.
The Interlaken BFM has an easy to use interface for the customer’s testbench consisting of a clocked data bus and control lines. Alternatively, Rockfish Technology offers a SystemVerilog packet based testbench for those customers needing a complete solution.
About Rockfish Technology
Rockfish Technology, an Electronic Design Automation (EDA) and design services company for the semiconductor industry, incorporated in 2005 in California. Rockfish Technology’s focus is providing the key IP and services to augment the customers functional verification effort and ensure the highest quality customer RTL.
|
||||||
Related News
- Cswitch Corporation Selects Rockfish Technology for Interlaken Verification IP
- Optima Design Automation Launches with Focus on Next-Generation Semiconductor Functional Safety Tools
- Imagination launches game-changing IMG Edge services platform for design verification and validation
- Cadence Launches the Pegasus Verification System, a Massively Parallel Physical Signoff Solution
- Oski Technology Launches Formal Verification IP Portfolio for ARM AMBA Interface Protocols
Breaking News
- Synopsys Completes Acquisition of DINI Group
- Diamond Design Software from Lattice Semiconductor Enables Enhanced Security Features for MachXO3D FPGAs
- Gyrfalcon's New Chip Raises Bar (12.6 TOPS/W) on High Performance Edge AI with Lower Power Use
- Nordic Semiconductor unveils world's first dual Arm Cortex-M33 processor wireless SoC for the most demanding low power IoT applications
- FlexIC Foundry enables custom flexible integrated circuit design
Most Popular
- Nordic Semiconductor unveils world's first dual Arm Cortex-M33 processor wireless SoC for the most demanding low power IoT applications
- Secure-IC and Andes Technology jointly provide cybersecurity enhanced RISC-V cores
- Efinix Rolls Out Trion T120 FPGAs
- Synopsys DesignWare ARC Data Fusion IP Subsystem Incorporated by Himax in Their Artificial Intelligence WiseEye ASIC
- Rianta Releases Ethernet MAC/PCS/FEC IP Suite for ASICs targeting Datacenter, Networking and 5G Mobile Infrastructure
|
E-mail This Article | 
|
|
Printer-Friendly Page |