Montpellier, France -- November 12, 2007
-- Menta, a fabless semiconductor company, unveils the second generation of its embedded-FPGA (eFPGA) technology IP. This new generation delivers superior performance in term of area, power consumption and frequency. Unlike existing solutions that require the use of costly full custom design flows, the Menta eFPGA core is designed to work with generic standard cells, memories and EDA design flows.
“This new generation is more suitable for SoC development”, said Laurent Rougé, CEO of Menta. “We have focused in our development on the enhancement of critical features for SoC integration”.
The Menta’s eFPGA is a customizable domain-specific programmable core made with dedicated Look-Up-Tables (LUT), and according to the targeted applications, some additional hard macro blocks (multiplier, memory…) can be plugged inside the core to increase speed, reduce power and area. “Our goal is to reach SoC performance with a flexible architecture”.
Today’s consumer electronics manufacturers need to quickly adopt new technologies and standards to stay ahead of the competition. For a designer team it is a big challenge due to time-to-market and cost pressures. They have the choice between custom silicon and ASSP (Application Specific Standard Product), all with advantages and drawbacks. Sometime they also additionally integrate on the PCB board FPGA to have flexibility and evolution perspective.
“We come back like we were twenty years ago when we used several components soldered on a PCB board to make system”.
Menta eFPGA IP, now propose to consumer electronics manufacturers to integrate on the same silicon a fixed part (CPU, memory, controller) that they can find on SoC, and a flexible part to add new functionalities, or for debugging, evolution, compatibility, etc…
“Creating a hardware platform by using the Menta eFPGA, means a SoC which can address multiple applications or multiple generations of a consumer device. It’s a true development accelerator and more profitable for our customer”.
The Menta eFPGA-II is programmed from Verilog or VHDL and use classical EDA synthesis tools. Menta’s toolset performs optimization, placement and routing, and produces the bit stream according to the customized eFPGA.
The Menta eFPGA core IP fits easily into conventional SoC design flows, since it is a soft core and is technology independent. The integration support and services are provided by Menta
The Menta eFPGA-II is available now. More information regarding the solution can be found at www.efpga.com