NetLogic Microsystems and TSMC Collaborate on Industry-Leading 55nm Technology for Advanced Low-Power Knowledge-based Processors

NetLogic Microsystems is one of the first companies to tape-out and receive silicon on the advanced 55nm technology node

Mountain View, Calif. And Hsinchu, Taiwan, R.O.C. – Nov. 26, 2007 – NetLogic Microsystems, Inc. [NASDAQ: NETL], the leader in the design and development of knowledge-based processors and high-speed integrated circuits, and Taiwan Semiconductor Manufacturing Company [TSE: 2330, NYSE: TSM] (TSMC), today announced their collaboration on the industry-leading 55nm semiconductor process technology for NetLogic Microsystems’ advanced knowledge-based processors.

NetLogic Microsystems’ latest knowledge-based processor, which was fabricated on TSMC’s 55nm-GP process, offers significant power, performance and cost advantages over competitive products as a result of the close collaboration between NetLogic Microsystems and TSMC, the industry leading silicon foundry manufacturer. This new knowledge-based processor was specifically designed for the 55nm-GP process to take full advantage of the advanced process technology. NetLogic Microsystems has developed a suite of custom circuits optimized around TSMC’s 55nm node, including analog and clocking circuitry for high-speed interface, core processing elements and other standard cells, as well as refining the design and tape-out flow for this node. As a result, NetLogic Microsystems is now positioned to efficiently design other advanced products for the 55nm node and enjoy the benefits of this half-node across multiple products. A second chip targeted for this process has already taped-out and is currently in fabrication at TSMC.

This achievement extends upon the existing collaboration between TSMC and NetLogic Microsystems on the use of advanced cost-effective half-node technologies, including 110nm and more recently the 80nm process, which was announced in Feb. 2007. The companies expect to broaden the relationship to include NetLogic Microsystems’ 10-Gigabit Ethernet physical layer products and other process technologies from TSMC.
“We are pleased to have collaborated closely with TSMC on the 55nm–GP process technology,” said Mo Maghsoudnia, vice president of Manufacturing at NetLogic Microsystems. “The close technology collaboration has enabled us to achieve superior performance, lower power consumption and higher yields across our entire product family. We look forward to expanding our collaboration into our new product lines to allow for the delivery of best-in-class products to our customers.”

“NetLogic Microsystems made a significant achievement by being one of the first to tape out and manufacture with our 55nm-GP process,” said Jason Chen, vice president of corporate development at TSMC. “This is particularly notable, considering the high logic density and complexity of NetLogic Microsystems’ new chip. We are excited to once again work closely with NetLogic Microsystems as one of the lead customers for our advanced half-node processes.”

TSMC’s half-node strategy, including the latest 55nm process technology, has a proven track record of helping customers achieve a crucial edge in competitive marketplaces. By offering lower power consumption, lower cost and improved performance, customers benefit from the proven technology at minimal risk and accelerated development timeline.

NetLogic Microsystems’ knowledge-based processors offer the industry’s most advanced parallel processing capabilities to enable quad-play (convergence of voice, video, data and mobility) and IPv6 applications. The use of TSMC’s 55nm process technology and state-of-the-art design techniques allow this newest processor to perform 500 million decisions per second (MDPS) at a lower cost and using less power than all previous designs. Over the next several months, NetLogic Microsystems will announce more details about the specifications and target markets for these new products fabricated in TSMC’s 55nm process.