High performance hardware verification board and IP enables quick implementation of OC192 (10 Gbps) wired networks
SAN JOSE, Calif., Dec. 4, 2007 -- Xilinx Inc., the world's leading provider of programmable logic solutions, today announced complete solutions for the Optical Internetworking Forum (OIF) System Packet Interface (SPI) 4.2 and SerDes Framer Interface (SFI) 4.1 standards, the industry's highest performance channelized packet interfaces. Based on its industry-leading high-performance Virtex(TM)-5 LXT FPGAs, the solutions feature the ML550 hardware verification board, SPI-4.2 LogiCORE(TM) IP and SFI-4.1 reference design. Verified across multiple FPGA platforms, the solutions accelerate the design cycle of wired networking systems that require OC-192 (10 Gbps), multiple OC-48 (2.5 Gbps) or 10 Gbps Ethernet interfaces, resulting in much faster time-to-market than competing solutions.
"High-speed standards such as SPI-4.2 and SFI-4.1 are used in demanding applications that require proven silicon, reliable and precise data capture, IP cores, and simple integration," said Anil Telikepalli, senior manager of Platform Solutions Marketing at Xilinx. "Our field-tested and hardware- verified Virtex-5 FPGA solutions for SPI-4.2 and SFI-4.1 dramatically reduce design risk while providing the highest bandwidth"
The Xilinx ML550 board is ideal for development and evaluation of OIF and other networking interfaces, allowing designers to implement high-speed applications with extreme flexibility. Xilinx unique ChipSync(TM) technology, available only in Virtex-5 FPGAs, provides accurate dynamic alignment of clock and data using 75 ps programmable delays, enabling improved timing and reliable operation under changing system conditions.
The Xilinx SPI-4.2 LogiCORE(TM) IP, which is fully compliant with the OIF SPI-4.2 standard, interconnects physical layer ASSPs to link layer FPGA devices in a wide range of networking applications and multi-service DWDM and SONET/SDH-based transport systems. The Xilinx SPI-4.2 IP core provides proven interoperability with industry leading ASSPs and provides up to 20 percent higher data bandwidth due to optimized payload efficiencies as compared to competing FPGA offerings. The Xilinx SFI-4.1 reference design supports up to 710 Mbps/channel with dynamic alignment to provide a robust solution for OC- 192 framer interfaces
Pricing & Availability
The SFI-4.1 reference design is immediately available free of charge. The SPI-4.2 LogiCORE IP is available for a free evaluation and can be purchased for an $18,000 site license fee. For more information visit http://www.xilinx.com/spi_sfi. The Virtex-5 LXT FPGA ML550 board is available for $2,200 at http://www.xilinx.com/ml550.
About Xilinx Virtex-5 FPGAs
Named 'Product and Innovation of the Year' by EDN Magazine, the Virtex-5 family represents the fifth generation in the award-winning Virtex series. Built upon the industry's most advanced 65nm triple-oxide technology, breakthrough new ExpressFabric(TM) technology and proven ASMBL(TM) architecture, the Virtex-5 family includes four domain-optimized platforms for high-speed logic, digital signal processing (DSP), embedded processing and serial connectivity applications. Production devices are shipping now and may be purchased online or through Xilinx distributors. Visit http://www.xilinx.com/virtex5 for more information.
Xilinx is the worldwide leader in complete programmable logic solutions. For more information, visit http://www.xilinx.com.