Stratix III FPGAs Combined With Quartus II Software Enable Industry's FastestCompile Times per LE for Faster Overall Timing Closure
San Jose, Calif., January 22,2008—Altera Corporation today announced availability of the industry’s highest density FPGA. A member of Altera’s 65-nm Stratix® III family, the EP3SL340 features an industry-leading 340K logic elements (LEs), supports DDR3 memory with interface speeds in excess of 1067 Mbps, and offers the lowest power consumption of any high-density, high-performance programmable logic device (PLD). Stratix III FPGAs are an ideal solution for a broad range of applications in a variety of end markets, including communications, computer and storage and military/aerospace.
The Stratix III EP3SL340 FPGA provides a 25 percent performance advantage over competing high-density FPGAs and leverages Altera’s Programmable Power Technology, delivering 29 percent lower power consumption. The devices also provide greater than 1067‑Mbps DDR3 memory interface speeds, a 33 percent advantage in memory performance over competing FPGA solutions. The combination of 340K LEs, 17 Mbits of embedded memory and 575 18 x 18 multipliers gives designers an unparalleled level of functionality.
“Altera’s Stratix III FPGA family delivers the density and performance that our NXP prototyping platforms require,” said Heiko Rühlemann, senior system and application engineer, NXP Semiconductors. “Our NXP prototyping platform enables hardware and software engineers to test their designs prior to tapeout, under real-time conditions, reducing design costs and time to market. Working closely with Altera through its early adopter program, we were able to seamlessly integrate the EP3SL340 onto our NXP prototyping platforms, allowing us and our customers to keep engineering schedules and meet time-to-market goals. The NXP prototyping system is used in several business units and business lines of NXP and Philips (Consumer Lifestyle, Healthcare and Lighting).”
“The 340K LEs offered in EP3SL340 FPGAs will be a tremendous advantage for customers using our development platforms for ASIC prototyping and systems development,” said Reuven Weintraub, president and CTO of GiDEL. “This level of density and the performance offered by Stratix III FPGAs ensures our latest reconfigurable algorithm acceleration systems and next generation of high-end system-on-a-chip verification platforms are second to none.”
Fast Compile Times for Greater Design Productivity
The combination of Stratix III FPGAs with Altera® Quartus® II design software delivers a productivity advantage that competitive solutions are unable to match—far shorter compile times for faster overall timing closure. With this capability, possible through the advanced place-and-route algorithms in Quartus II software, high-end design engineers can achieve faster time to market.
“Stratix III FPGAs offer an unmatched combination of low power, high performance and high density,” said David Greenfield, senior director of product marketing, high-end FPGAs, at Altera Corporation. “The availability of our 340K-LE device allows us to clearly demonstrate our technology leadership position and deliver to our customers a device that provides the fastest memory interface and fastest system performance while reducing overall power consumption and compile times. Our customers have demanded an FPGA solution that meets their high-end FPGA requirements, and we have delivered such a solution with the EP3SL340.”
Stratix III EP3SL340 FPGAs are shipping now to customers in volume. For more information about Stratix III FPGAs, including webcasts, handbooks and other documentation, visit www.altera.com/stratix3.
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