Altera Provides 50-Gbps SFI-5 Interface on Stratix II GX FPGAs
Offers a High-Speed Interface to Physical Layer Devices
San Jose, Calif. -- January 23, 2008 -- Altera Corporation today announced SERDES Framer Interface Level 5 (SFI-5) standard support in its Stratix® II GX FPGAs with embedded transceivers, providing a 40- to 50-Gbps interface for high-performance optical communications applications. The SFI-5 specification is a chip-to-chip standard that ensures interoperability between forward-error correction (FEC) and the framer, as well as from industry-leading optical transponder devices. Hardware tested to verify compliance to the SFI-5 standard, Stratix II GX FPGAs feature up to 20 high-speed serial transceiver channels that can operate at data rates between 600 Mbps and 6.375 Gbps, easily satisfying SFI-5 interface requirements.
The SFI-5 Optical Internetworking Forum (OIF) specification was developed to provide an interface between the network processing devices and the optical transponder to enable higher bandwidths. The SFI-5 standard addresses network transport formats including OC-768, STM256, and OTN OTU-3. In addition to supporting the SFI-5 standard, Altera® Stratix II GX FPGAs are designed to deliver an extensive set of optical and electrical protocols with low power and industry-leading signal integrity, making them an ideal solution for use in all high-speed designs.
“The SFI-5 standard, as implemented in our Stratix II GX FPGAs, is being adopted rapidly by high-performance optical communications systems,” said David Greenfield, senior director of product marketing, high-end products, at Altera Corporation. “For designers developing next-generation wireline communications applications, our Stratix II GX FPGAs easily exceed the demanding SFI-5 signal integrity and skew requirements with ample margin.”
About Stratix II GX FPGAs
Featuring up to 20 transceiver channels operating from 600 Mbps to 6.375 Gbps, Altera’s Stratix II GX FPGAs offer a high-performance, high-density solution to applications that require multi-gigabit serial I/O. Altera’s transceiver technology provides robust noise immunity and industry-leading jitter performance, while maintaining the lowest power consumption. Stratix II GX devices offer a complete solution supporting many serial protocols, including SerialLite II, XAUI, SONET/SDH, Gigabit Ethernet, Fibre Channel, Serial RapidIO®, PCI Express, SMPTE 292M and SFI-5.
Production-qualified Stratix II GX FPGAs, with support for the SFI-5 protocol, are available now. For additional information about Stratix II GX FPGA SFI-5 protocol support, visit www.altera.com/sfi5. For general information about Altera Stratix II GX FPGAs, visit www.altera.com/stratix2gx.
About Altera
Altera programmable solutions enable system and semiconductor companies to rapidly and cost-effectively innovate, differentiate and win in their markets. Find out more at www.altera.com.
|
Intel FPGA Hot IP
Related News
- NEC Chooses Altera Stratix II GX FPGAs for New ExpEther Interface Technology
- Altera Announces Stratix IV GT and Arria II GX FPGAs: Expands Industry's Broadest Integrated Transceiver Portfolio
- Harris Corporation Selects Altera Stratix II GX FPGAs for Platinum Line of Routing Switchers
- Harris Chooses Altera Stratix II GX FPGAs for New Multi-Format Broadcast Router Line
- Altera Ships Production-Qualified Stratix II GX FPGAs
Breaking News
- Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development
- Controversial former Arm China CEO founds RISC-V chip startup
- Fundamental Inventions Enable the Best PPA and Most Portable eFPGA/DSP/SDR/AI IP for Adaptable SoCs
- Cadence and TSMC Collaborate on Wide-Ranging Innovations to Transform System and Semiconductor Design
- Numem at the Design & Reuse IP SoC Silicon Valley 2024
Most Popular
- GUC provides 3DIC ASIC total service package to AI/HPC/Networking customers
- Qualitas Semiconductor Appoints HSRP as its Distributor for the China Markets
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Huawei Mate 60 Pro processor made on SMIC 7nm N+2 process
E-mail This Article | Printer-Friendly Page |