Dual Port Register File Compiler (1 Read-Only Port, 1 Write-Only Port)
Jim Lipman Joins Logic NVM Pioneer Sidense as Marketing Director
Update: Synopsys Expands DesignWare IP Portfolio with Acquisition of Sidense Corporation (Oct. 17, 2017)
Industry veteran’s semiconductor industry and IP experience will enhance spread of embedded non-volatile memory in many digital and analog applicationsOttawa, Canada - February 20, 2008 - Sidense, a leading developer of Logic Non-Volatile Memory (NVM) IP cores, today announced the appointment of Jim Lipman as its Director of Marketing. Dr. Lipman will report to CEO and President Xerxes Wania and be responsible for Sidense’s worldwide marketing activities as the company continues to expand its product offerings and customer base.
“I have worked with Jim for the past year and am happy he decided to join the Sidense team,” said Xerxes Wania. “Jim has tremendous industry experience and contacts and will be a key contributor as we extend our business and technology leadership position.”
Dr. Lipman was most recently Vice President of Client Services at Cain Communications. His prior experience, focusing on semiconductors, EDA tools and semiconductor IP, spans management positions in design, marketing and public relations at many well known companies, including TechOnLine, VLSI Technology, Hewlett-Packard and Texas Instruments. Dr. Lipman holds a Doctor of Engineering degree from Southern Methodist University and an MBA from Golden Gate University.
“I am very pleased to join a company such as Sidense with their industry leading non-volatile memory technology and products,” said Dr. Lipman. “I appreciate the opportunity to be part of the Sidense team as we continue to explore and identify new opportunities for our low cost and highly secure embedded memory IP for a broad range of applications.”
About Sidense
Sidense, listed on EE Times 60 Emerging Startups list for 2008, provides secure, dense and reliable non-volatile, one-time programmable (OTP) memory IP for use in standard-logic CMOS processes, with no additional masks or process steps required. Sidense's patented one-transistor 1T-Fuse™ architecture provides the industry’s smallest footprint and lowest power Logic Non-Volatile Memory (NVM) solution.
Sidense OTP memory is available at 180nm, 130nm, 90nm and 65nm and scalable to 45nm and below. The IP is available at UMC, TSMC, SMIC, Tower and Chartered. Customers are using Sidense OTP for analog trimming, code storage, encryption keys such as HDCP, RFID and Chip ID, medical, automotive, and configurable processors and logic. For more information, visit www.sidense.com.
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