Pixelworks Produces Complex Image Processing SoC with Arteris Network-on-Chip (NoC) Interconnect IP SolutionSAN JOSE, Calif.-- February 26, 2008 --
Arteris, Inc., the leading provider of Network-on-Chip (NoC) solutions, today announced that Pixelworks, Inc. has selected Arteris’ on-chip interconnect IP solution for use in its next-generation digital video image processor products. Pixelworks, a leading provider of chips to the advanced display industry, is utilizing the Arteris NoC solution to speed design and increase performance in its innovative co-processor solutions for digital flat panel display television applications.
“The Arteris NoC solution provides us with a new option for on-chip communication to help deliver higher performing products, faster and at lower cost,” said Bob Zhang, VP of Technology of Pixelworks. The Arteris’ NoC technology offers an efficient platform for semiconductor companies to reuse existing IP so that current chips can become IPs for the next generation of designs. The methodology delivered by Arteris’ NoC architectural exploration tools enables on-chip communication optimization in the early stages of the IC design cycle and allows designers to perform more in-depth analysis of design decisions. “We are very excited to work with Pixelworks and be part of their success. Their use of our NoC technology demonstrates the broad impact that Network-on-Chip technology can have in the semiconductor industry,” said K. Charles Janac, President and CEO of Arteris.” Pixelworks production of a digital television image co-processor with a Network-on-Chip interconnect is a major milestone for Arteris.
Arteris’ NoC Solution handles high bandwidth traffic between multiple processors, video engines, and high-speed memories; and has proven to provide significant performance and IP integration improvements while, in many cases, using fewer gates and wires and operating at lower power than traditional bus-based approaches.About Arteris Inc.
Arteris, Inc. provides Network-on-Chip (NoC) interconnect IP and associated design tools to improve the performance of system-on-chip (SoC) architectures for multimedia, telecom, and mobile applications. Arteris' NoC solution manages the on-chip communications within complex SoCs delivering high performance, while reducing the number of global wires and lowering power consumption. It allows chip developers to implement efficient and high-performance SoC designs, overcoming limitations of traditional layered or pipelined bus-based architectures. Arteris' technology is scaleable in terms of the number of IP blocks designers can network, as well as with deep submicron silicon manufacturing processes. The Arteris NoC solution is compatible with existing design flows and IP interface standards.
Arteris operates globally with headquarters in San Jose, California and an engineering center in Paris, France. Arteris has raised more than $24 million in equity funding from an international set of investors. More information can be found at http://www.arteris.com