SANTA CLARA, Calif. The critical enabler of design reuse will be the intellectual property (IP) repository, according to panelists at an IP2000 session on Monday (March 20). Such a database will give system companies and ASIC developers a place to store reusable design elements, and give design engineers a way to access those elements.
"The repository allows not only the storage of cores but acts as a platform where the system designer enters design goals. It will be the engine that comes up with 40 or 100 times more choices than [the designer] had in the past," said Gary Smith, chief EDA analyst with research firm Dataquest Inc. (San Jose, Calif.), in opening the panel session. "Those companies that are 'getting it' are achieving significant competitive advantage over those that don't understand." .
After presenting overviews of their individual companies' efforts on an IP repository, representatives from Alcatel Microelectronics, Cadenc e Design Systems Inc., Mentor Graphics Corp. and Motorola Inc. opened the floor to questions from the audience.
Among its general conclusions, the panel agreed that introducing such IP repositories is difficult and must be accompanied by significant changes in attitude from both engineers and managers changes that are not always forthcoming. In addition, even companies that have not yet introduced embedded software modules to complement semiconductor IP cores in such repositories recognize that they must add embedded modules to provide an effective reuse infrastructure. And to support geographically diverse design teams and IP sources, such infrastructures should be based on Internet technology, whether for intra-company or inter-company use.
The primary benefits of such repositories are increased design productivity and reduced turnaround time for designs, but panelists said that accurate benchmarking of these benefits is not yet possible mainly because of an inability to make stric t comparisons of such company-wide changes.
Moderator Smith told the audience that the United States and the rest-of-the-world regions are lagging behind Europe on IP, with a lot of advanced thinking coming from southern France.
Pierre Bricaud, director of marketing for the Inventra division of Mentor Graphics, said that an IP repository cannot include only descriptions of cores, but should also include all necessary elements to ensuring the quality, ease-of-use, and support of a core to get a designer to what-if analyses. It is becoming clear, Bricaud said, that IP repositories should support the extensible markup language (XML) format.
Thomas Zimmerman, IP repository program manager at Motorola's Semiconductor Products Sector, echoed Bricaud's comments. "A quick search and find system is nice, but eventually we need to evaluate the real core IP data," he said.
Zimmerman highlighted the essential function of the data administrator who sits between IP creators and IP consumers, and of the importance of a feedback mechanism from consumers to creators.
Aparna Dey, director of IP reuse services for Cadence Design Systems (San Jose, Calif.), aroused the audience's interest with a presentation based on Cadence experience in developing for Oki Electric a complete IP repository, including embedded software. Dey revealed that 30 people had spent 18 months researching and developing an infrastructure intended to support 1,500 engineers at 16 sites around the world. The group completed its work in December 1999, she said.
The repository is being adopted gradually by Oki, and is already being used by one site in Japan and one in the United States, Day said.
"It has to be scalable, Web-based and standard technology," Dey said. "Divisions plug into it when they are ready. It allows key clients to look into the system. Cadence is in the process of deploying this solution for our other clients and in our own design centers," she concluded.
IP poster boy
Smith called Alcatel Mi croelectronics the "poster-boy" for the IP revolution, and one of its most experienced protagonists.
But Eric Schutz, vice president of business development at Alcatel Microelectronics, said the company has been wrestling with design reuse for many years and that its progress has not been achieved without problems.
"We made mistakes in trying to centralize the SoC design methodology," he said. "The right thing we did was joining the VSIA [Virtual Socket Interface Alliance]. But then we tried to use the momentum [of that organization] to change things in Alcatel. The dream was that with the emergence of IP standards, the ADF [Alcatel Design Factory] would do all the cores. It was not accepted by the other designers."
To help engineers accept others' cores for reuse and offer their own for reuse, Schutz said Alcatel has reworked its plan with a distributed Internet-enabled initiative it calls Alcatel Design Laboratory, which will ultimately include engineering groups in Europe and the United Stat es.
"You have to track compliance to internal company standards and then come up with an efficient selection of candidate cores," Schutz said. "You don't offer engineers an infinite set of cores, but you do have to support the rapid introduction of selected cores into the database. You also have to look at the motivation for design groups to share cores.
"Managers are the barriers to this kind of harmonization and we have had to give engineers the feeling that they benefit," Schutz continued. "The centralized approach failed. Now we are asking the whole [Alcatel] engineering community to take part."
Loss for words
Asked to quantify the design time reduction they could claim for their IP repositories, no panelist was able to give an answer, stating that fair comparisons are difficult.
It was left to Smith to point out that ASIC design times are not getting shorter. "If anything they've increased," he said. "The average design cycle is now 13 months. But we're not doing 100,000-g ate designs any more, we're doing 10-million-gate designs. The whole point is that IP repositories give some hope of containing the design time while we get all this extra functionality."