Imperas Unleashes Open Source Initiative to Establish Common, Open Standard for Multicore SoC Design
Imperas Unleashes Open Source Initiative to Establish Common, Open Standard for Multicore SoC Design
Thame, U.K. -- March 3, 2008 -- Imperas Ltd. today launched Open Virtual Platforms (OVP) to establish a common, open standard solution for developers to quickly and inexpensively simulate embedded software on system-on-chip (SoC) designs.
The donation, representing approximately $4 million worth of technology investment, includes modeling technology, Imperas’ existing library of models, and OVPSim, a proven reference simulator. Imperas will support and manage the OVP website, and will contribute much of its innovation to keep this infrastructure evolving.
“Proprietary platform technologies that limit interoperability, or that are too slow for adequate software verification, have dramatically limited the progress of this entire industry,” asserts Simon Davidmann, Imperas’ chief executive officer and founder. “OVP is the first realistic solution to these problems and, as such is, the most important donation related to SoCs since SystemVerilog. The groundswell of initial support clearly demonstrates the need for revolutionary thinking in this area.”
OVP addresses problems embedded software developers have when modeling the SoC that hosts their software. These range from modeling environment complexity, lack of open resources for building platforms, to insufficient simulation speed for software verification.
The quality and performance of the OVP technology has already been proven in production design projects by multiple end-users, including Azul Systems Inc., provider of enterprise server appliances. It has successfully used the OVP technology to develop a virtual platform for the Azul Vega multiprocessing appliance, known as the Azul Compute Appliance. “This OVP-based platform has enabled our software development team to streamline the development process overall,” remarks John Brennan, Azul’s vice president of hardware engineering. “In addition, the Azul OS boots just as fast on the OVP platform as it does on the SoC.”
Multicore Issues
The embedded software programming issues introduced by the trend toward multicore SoCs is well documented as the most significant problem for SoC delivery today. As SoC architects add more processor cores, embedded software complexity and volume increases exponentially due to amplified software concurrency and shared on-chip resource bottlenecks.
The best way to solve these problems is to comprehensively test the software early in the process, which requires a simulation platform. The platform must handle SoC complexity and deliver the performance required to verify billions of operational “cycles.” The solution must permit model interoperability and the use of legacy models to reduce integration risks and costs. End users, tool and intellectual property (IP) developers and service providers all must be able to contribute to the platform development infrastructure.
The OVP-based platform satisfies these criteria by enabling software simulations that execute at hundreds of MIPS. It handles multicore architectures, and has a robust set of application programming interfaces (APIs) for the easy modeling of processors, components and platforms. The utilization of an open source modeling approach enables the community to drive the further technology development and leverage existing work.
“OVP provides another channel for MIPS to expose SoC architects and embedded software developers to our processor IP, and makes it easier for our customers to port applications to our processors,” notes Jack Browne, MIPS Technologies’ vice president of marketing. “With software now a major part of overall SoC development costs, OVP models and associated tools will enable our customers to accelerate their SoC deliveries.”
The OVP Ecosystem
The OVP infrastructure benefits the complete OVP ecosystem, enabling software development success for users, new markets for tool developers, a level playing field for IP providers, and more opportunities for service providers. The initial list of supporters for OVP includes: Azul Systems Inc.; Beyond Semiconductor; Brian Bailey Consulting; Calypto™ Design Systems Inc.; Carbon Design Systems™ Inc.; CriticalBlue; Denali Software Inc.; Element CXI, Inc.; EVE; Forte Design Systems Inc.; Imperas Ltd.; Jennic Ltd.; MIPS Technologies Inc.; Novas Software Inc.; Sigmatix; SiBridge Technologies; Professor Don Thomas of Carnegie Mellon University; and Tensilica Inc.
“The fundamental excitement around the OVP launch is due to the ability for the industry to coalesce on an open infrastructure and enable real software development earlier in the design process,” remarks Mark Gogolewski, Denali’s chief technology officer. “This effectively creates a new market for model developers to extend our support to software engineers in multicore environments.”
OVP Donation and Website
The OVP website is found at www.OVPworld.org. It will serve as the portal for OVP, with details about the technology, a discussion forum for the OVP community, and links to download all OVP components.
Available for download, free of charge are:
- APIs for building platform verification infrastructure, and developing behavioral and processor models
- Existing model libraries of processors, behavioral components, peripherals, and platform templates
- OVPsim, a free reference simulator shipped as an executable
The website offers presentations, datasheets, videos, demonstrations, discussion forums, press information, resources and the OVP technology for download including models of ARM, MIPS, and OpenRISC OR1K processors.
About Imperas
Imperas is focused on delivering technology in the Electronic Design Automation (EDA) space. By blending hardware and software technologies and design processes together, Imperas provides methodologies, technologies and products to enable the efficient programming, debug, and verification of Multiprocessor Systems-on-Chip (MPSoCs). With an engineering base in the UK, Imperas distributes its products to customers worldwide. For more information, visit: http://www.imperas.com.
|
Related News
- Linaro announces Android Open Source Project port for ARMv8-A Architecture is ready and running on a 64-bit multi-core SoC
- QuickLogic Launches Qomu - an Open Source SoC Dev Kit That Fits in Your USB Port
- OpenHW Ecosystem Implements Imperas RISC-V reference models for Coverage Driven Verification of Open Source CORE-V processor IP cores
- Imperas and Metrics Collaborate to Jump Start RISC-V Core Design Verification Using Open Source Instruction Stream Generator
- Linux Foundation to Host CHIPS Alliance Project to Propel Industry Innovation Through Open Source Chip and SoC Design
Breaking News
- MIPS Releases P8700, Industry's First High-Performance AI-Enabled RISC-V Automotive CPU for ADAS and Autonomous Vehicles
- Panasonic Automotive Systems and Arm Partner to Standardize Software-Defined Vehicles
- Ceva, Inc. Announces Third Quarter 2024 Financial Results
- Logic Fruit Technologies Launches JESD204D Transmitter and Receiver IP - Advancing High-Bandwidth Data Solutions
- Sondrel announces that it is opening up its library of IP for licensing
Most Popular
- Tessolve to Acquire Germany's Dream Chip Technologies
- Jolt Capital buys and invests in Dolphin Design's carved-out mixed-signal IP activities
- Ceva, Inc. Announces Third Quarter 2024 Financial Results
- Siemens' Tessent In-System Test software enables advanced, deterministic testing throughout the silicon lifecycle
- Sondrel announces that it is opening up its library of IP for licensing
E-mail This Article | Printer-Friendly Page |