Free reference design & 3rd party IP with proven 65nm Virtex-5 LXT devices enable 40G networking system developmentSAN JOSE, Calif. -- March 4, 2008
-- Xilinx, Inc., the world's leading supplier of programmable logic solutions, today announced availability of a free hardware-verified reference design and 3rd party IP for the optical internetworking forum (OIF) SERDES framer interface level 5 (SFI-5) standard. The SFI-5 interface enables communication between the optical transmission devices and the network processing system. Based on its 65nm Xilinx(R) Virtex(TM)-5 LX330T FPGAs, the reference design accelerates the development of wired networking systems requiring 40Gbps payload rates, enabling applications using transport interfaces like OC768/STM256 and OTN OTU-3 in systems such as optical cross connects, fiber optics terminators and repeaters, 40G multiplexers, and test equipment.
The reference design has been hardware verified on the Xilinx ML525 evaluation platform and characterized for skew, temperature, process, and voltage variations to ensure reliable interface, compatible with the OIF SFI-5 standard. Leveraging the industry's lowest power transceivers -- typically consuming less than 100mW per transmitter/receiver pair -- this Virtex-5 LXT FPGA-based reference design uses 17 transceivers (16 for data and one for calibration).
"Networking equipment is rapidly moving to 40G payload rates where SFI-5 provides the chip-to-chip interface to the optical transponders," said Anil Telikepalli, senior manager of platform solutions marketing at Xilinx. "The Virtex-5 LXT FPGA platform is ideal for implementing the SFI-5 physical layer, as well as additional logic blocks such as forward error correction and framer. The hardware-verified SFI-5 reference design takes advantage of the industry's only 65nm FPGA in production today with built-in low-power transceivers, providing generous deskew margin on the receiver side for sustained operation under changing system conditions."
Wired networking designers seeking additional Virtex-5 LXT FPGA solutions for 40G system design can also benefit from IP offerings from Xilinx Alliance program participant Avalon Microelectronics for 40Gbps applications, including: SxI-5-compliant SFI-5 physical layer core, 40G SONET-768/SDH-256 core with POS and 43G OTU-3 with G.709 FEC or other Enhanced FEC. For more information visit: http://www.avalonmicro.ca/products/index.php?Category=6
.About Xilinx Virtex-5 FPGAs
The Virtex-5 family represents the fifth generation in the award-winning Virtex series. Built upon the industry's most advanced 65nm triple-oxide technology, breakthrough new ExpressFabric(TM) technology and proven ASMBL(TM) architecture, the Virtex-5 family includes four domain-optimized platforms for high-speed logic, digital signal processing (DSP), embedded processing and serial connectivity applications. Production devices are shipping now and may be purchased online or through Xilinx distributors. For further cost reductions, the Xilinx(R) EasyPath(TM) program enables customers to use Virtex-5 devices in high-volume applications. Visit http://www.xilinx.com/virtex5
for more information.Pricing and Availability
The free reference design for SFI-5 interface is available for download at http://www.xilinx.com/spi_sfi. The Virtex-5 LX330T FPGA is available today and the ML525 development board will be available in May 2008. For more device information visit http://www.xilinx.com/virtex5
Xilinx, Inc. is the worldwide leader of programmable logic solutions. For more information, visit http://www.xilinx.com