eASIC Integrates Front-End from Interra to Accelerate Deployment of Nextreme Structured ASICs

SAN JOSE, Calif.-- March 04, 2008 -- Interra Systems, a leading provider of EDA building blocks, methodologies, and services for SoC designers, announced successful integration of Concorde, a Verilog, VHDL and mixed language parser, elaborator and synthesis front-end into the eX and eWizard design tools for the Nextreme 90nm family of structured ASICs from eASIC.

“We needed field proven comprehensive front-end technology to get to market faster,” said Herman Schmit, Technology Architect at eASIC. “Interra’s compliance to language standard and responsive support helped us reduce development time,” he added.

“Structured ASIC devices such as Nextreme from eASIC are making it possible for design community to deliver products needed at today’s pace,” said Vijeta Kashyap, Vice President and GM at Interra Systems. “We deliver high quality Verilog, SystemVerilog and VHDL front-ends for commercial strength EDA applications with unmatched support commitment. We look forward to providing long term value to eASIC,” he added.

System Verilog/Verilog/VHDL Support for EDA Tools

Cheetah, the Verilog and SystemVerilog analyzer and Jaguar, the VHDL analyzer, are used as language front-ends by several well known industry tools from major EDA vendors, such as Synopsys(SNPS), Cadence(CDNS), Mentor(MENT), as well as startups. Robust field proven quality, professional support and customization services enable EDA tool developers to reduce time-to-market and development cost. Interra provides latest support for VHDL standard IEEE 1076, Verilog standard IEEE 1364 and SystemVerilog standard IEEE 1800. Interra also provides analyzers for other EDA standards like UPF, CPF, SDF, SPEF, DEF, LEF, HSPICE, and Liberty.

Beacon family includes test-suites for System Verilog, Verilog 2001, Synthesizable Verilog and VHDL, Verilog/VHDL mixed interface and PSL. Beacon test-suites are used by several companies to ensure compliance, coverage and quality of their tools’ support for EDA standards. Beacon offers reduced development costs and time to market for EDA tools.

About eASIC

eASIC is a fabless semiconductor company offering breakthrough Structured ASIC devices aimed at dramatically reducing the overall fabrication cost and time of customized semiconductor chips. ASIC and System-on-Chip designs are enabled through patented technology of FPGA-like programmable logic coupled with ASIC-like Via-layer customizable routing. This innovative fabric efficiently employs mask-less customization with Direct-write e-Beam, and thus allows eASIC to offer Structured ASICs with no mask-charges. Founded in 1999, eASIC Corporation is privately held, headquartered in Santa Clara, California. Investors include Vinod Khosla, Kleiner Perkins Caufield and Byers (KPCB), Crescendo Ventures, and Evergreen Partners. www.eASIC.com

About Interra Systems

Interra Systems is a leading provider of products and services for memory, ASIC, SoC and design automation. Interra offerings include support for System Verilog, Verilog, VHDL and other design automation standards for EDA tools, memory design automation, design flow and methodologies, compliance for digital audio video standards, encoders, decoders, automated digital content verification, and platform specific embedded software development to accelerate product deployment. Adaptive solutions from Interra Systems provide significant time to market and cost effectiveness. Visit http://www.interrasystems.com/ for more information.