STMicroelectronics expands Certitude deployment worldwide through multi-year agreement
CAMPBELL, Calif. – March 5, 2008 – Certess, Inc. the provider of functional qualification tools for systems on a chip (SoCs) and intellectual property (IP) blocks, today announced that STMicroelectronics, one of the world’s largest semiconductor manufacturers has expanded, through a two-year commitment, its corporate wide adoption of Certitude. Certitude provides an objective measure of quality in the SoC verification environment and certifies that if a semiconductor chip design had a bug, it would be found.
One of the key reasons STMicroelectronics selected Certitude for its state of the art verification flow is for its ability to ensure a high level of functional correctness and for its ease of use and simple concepts which can be quickly applied across all areas of verification. Certitude has proven to be able to find important bugs in areas that were considered fully verified by highlighting weaknesses in the verification environment.
“Today our state of the art verification flow contains functional qualification with Certitude to ensure a high level of functional correctness,” said Jean-Marc Chateau, group vice president at STMicroelectronics, IP & Design. “Traditional measurement methodologies such as code coverage have proven to be incomplete. Certitude’s functional qualification technology provides us with the mandatory information needed to ensure the quality in our internal IPs before integration at System on Chip level.”
“Having an industry leader like STMicroelectronics standardize on our Certitude functional qualification solution is a sign of a growing wave that will sweep the verification market.” said Michel Courtoy, CEO of Certess.
Certess will be demonstrating Certitude and its functional qualification capabilities at the Design, Automation, and Test in Europe (DATE) in Munich Germany, March 11-13, in stand #B14. For more information, see www.date-conference.com.
Certitude addresses two of the most critical problems associated with the design of semiconductors: first, that the functional verification process consumes more resources than the design process; and second, despite having a set of dedicated tools and methodologies that automate parts of the process and improve verification quality, companies find that functional logic errors are still the largest cause of silicon re-spins. Functional qualification tackles these problems by providing a direct measure of the quality of the verification environment to find functional errors, by identifying missing tests or checkers based on whether injected errors are activated, propagated and detected.
Certess, Inc. is the only electronic design automation company providing functional qualification products for companies that create and integrate complex design blocks or intellectual property (IP). The company’s technology provides design and verification engineers with an objective way to evaluate and improve the completeness of the verification environment, resulting in a shorter and more predictable process to integrate SoC designs and ensure high quality designs. The company is headquartered in Campbell, CA. For additional information, see www.certess.com.