Complete and Competitive ASIC & SoC Prototyping Solution With RTL Synthesis, Partitioning Software, and Best-in-Class Hardware for High-Speed VerificationMUNICH, Germany -- March 10, 2008
-- ProDesign, a leading supplier of high-speed ASIC and SoC verification platforms, today announced the launch of the CHIPit Iridium Prototyping Suite, a complete and seamless hardware assisted verification solution, that significantly improves traditional ASIC prototyping methodology and gives design engineers unprecedented speed, flexibility and ease-of-use reducing verification time dramatically in a most cost-effective manner.
The CHIPit Iridium Prototyping Suite combines the FPGA based CHIPit hardware with the new CHIPit Manager Pro software in a, tightly, integrated solution that guarantees the shortest design implementation time with maximum performance. The new CHIPit Suite includes the CHIPit Iridium Edition hardware, a market leading prototyping system, and the recently released CHIPit Manager Pro design implementation software package which includes an integrated RTL synthesis tool, powerful design partitioning software, that efficiently handle multi-million ASIC gate designs and an embedded Schematic Viewer to analyze the design.
Increasing complexity and verification time of ASIC designs have made ASIC prototyping methodology much more attractive, because it is possible to verify the ASIC at maximum speed. The problem of traditional ASIC prototyping solutions is that users often have hardware and software from different vendors, or develop them by themselves because there is no solution available where software and hardware is seamlessly optimized for each other. This often leads to problems between hardware and software, during design analysis, synthesis and partitioning that may dramatically lengthen the time of design implementation into a prototyping system.
“With the CHIPit Iridium Prototyping Suite ProDesign tackles these problems from a different view. ProDesign started 8 years ago developing and selling high-end hardware. Over the years we have gained a lot of experience in the design implementation flow and know exactly how the hardware works and where the problems between hardware and software come from. Based on this experiences, with the CHIPit Iridium Prototyping Suite, we created an ASIC prototyping package starting from the hardware perspective, where the software is dedicated and optimized for the hardware and solves all design implementation problems that the user had in the past,” said Heiko Mauersberger, CTO of ProDesign.
“With the CHIPit Iridium Prototyping Suite we satisfy our customers’ demands by offering a powerful, complete, seamless prototyping solution. With a very competitive pricing (starting price US$ 65,000) for the complete suite including hardware, design analysis, synthesis and partitioning software we want to extend our market share and give more customers the possibility to benefit from the prototyping methodology. We want our customers to concentrate on the development and verification of their ASIC designs and not on the development and debugging of their prototyping solution,” stated Gunnar Scholl, Director Marketing and Business Development at ProDesign.
The first public presentation of the CHIPit Iridium Prototyping Suite will be held at the ProDesign booth # A15 during the Design Automation and Test 2008 exhibition in Munich at March 11th – 13th.Pricing
The price for the CHIPit Iridium Prototyping Suite (Medium) which can handle up to 4 M ASIC gates will be US$ 65,000 in North America (€ 44.000 in Europe).
The price for the CHIPit Iridium Prototyping Suite (Large) which can handle up to 8 M ASIC gates will be US $95,000 in North America (€ 64.000 in Europe).
For more information about the company’s prototyping products, please visit: http://www.uchipit.com