Additional Library Vendors Join Synopsys' Tap-In Program to Streamline Design Process
Additional Library Vendors Join Synopsys' Tap-In Program to Streamline Design Process
MOUNTAIN VIEW, Calif.----March 8, 2000--Showing its continued commitment to solving difficult interoperability challenges, Synopsys, Inc. (Nasdaq: SNPS) today announced that Artisan Components, Inc., Virtual Silicon Technology and Virage Logic have joined the TAP-in(SM) program. By joining the program these companies gain access to Synopsys' popular Liberty(TM) (.lib + Stamp) library format, enabling their customers to get their products to market more efficiently by eliminating the three-way non-disclosure agreement (NDA) process.
Library and IP component modeling technology plays a crucial role in managing system-on-a-chip (SoC) design complexity. ``By streamlining the distribution process, Synopsys and its TAP-in members can help their customers shorten design cycles, accelerate time to market and promote interoperability,'' said Kevin Kranen, director of strategic programs at Synopsys. ``The benefit to the customers is significant. A single library solution accelerates each design flow and helps them move their products from mind to market much more efficiently.''
``Joining the Synopsys TAP-in program is a very strategic move for our company,'' said Jeff Lewis, vice president of market and business development at Artisan Components. ``Synopsys' open standard strategy, combined with our open library business model, is a powerful combination that will help our customers solve deep submicron design challenges.''
With the TAP-in program, members can leverage the EDA industry's continued investment in over 450-submicron Liberty libraries. The Synopsys Liberty format drives industry-leading tools in synthesis, simulation, timing analysis, formal verification, test, and power analysis. Synopsys continues to work very closely with leading global semiconductor vendors to ensure that Liberty evolves to accommodate ever-changing semiconductor technology.
``To meet today's tight time-to-market windows, we must help our customers speed the design process wherever possible,'' said Taylor Scanlon, president and CEO at Virtual Silicon Technology. ``Simplified access to Synopsys' popular library formats will help us achieve that goal.''
``Studies have shown the memory content of an SoC rising rapidly to over 70% by 2003 (Dataquest),'' stated Adam Kablanian, president and CEO at Virage Logic. ``This requires higher quality memories with comprehensive, accurate EDA models. The Liberty format is a key part of our embedded memory solution.''
Liberty's wide adoption eliminates a substantial barrier to design productivity, significantly easing the transfer of data among a broad class of EDA tools, while reducing the effort required to develop and maintain ASIC libraries. ``The ability to overcome barriers to accurate system design is a key challenge for today's designers,'' said Kurt Wolf, director of marketing at TSMC North America. ``Synopsys' open standard library technology format enables our customers to address their specific needs quickly and easily.''
Synopsys Takes Responsibility for Interoperability
In the past two years, Synopsys has made significant strides towards addressing EDA tool interoperability. The company has provided its members access to the industry's most widely used design formats and tools. Synopsys has extended its commitment to interoperability by offering its members training, documentation, seminars, an open forum for feedback, a Secure User Research Facility (S.U.R.F.) for testing, as well as a working example of an interoperability tool flow through the Spine99 initiative.
Synopsys offers the most extensive collection of interoperability programs and solutions available. The in-Sync program gives EDA vendors access to Synopsys' industry-leading software and documentation. Synopsys' TAP-in program advances EDA tool interoperability through technology exchange and licensing, allowing open and easy access to Synopsys' widely used formats. Members also receive access to the Synopsys Design Constraints (SDC) and VERA(TM) formats, with additional formats to come. For more information about Synopsys' interoperability programs, visit its web site at http://www.synopsys.com/partners.
About Synopsys
Synopsys, Inc., (Nasdaq:SNPS), is a leading supplier of electronic design automation (EDA) solutions to the global electronics market. The company provides comprehensive design technologies to creators of advanced integrated circuits, electronic systems and systems on a chip. Synopsys also provides consulting services and supports to its customers to streamline the overall design process and accelerate time-to-market. Additional information about Synopsys is available at http://www.synopsys.com.
Note to Editors: Synopsys is a registered trademark, TAP-in is a service mark and Liberty and VERA are trademarks of Synopsys Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
Contact:
Synopsys, Inc.
Troy Wood, 650/584-5717
twood@synopsys.com
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