Gaisler Research Joins eASIC’s Growing eZ-IP Alliance Program to provide Higher Performance LEON3 SPARC Soft Processor using Nextreme Zero Mask-Charge ASICs
Santa Clara, CA -- April 17, 2008 -- eASIC Corporation, a provider of zero-mask charge ASIC devices, today announced the immediate availability of Gaisler Research’s LEON3 SPARC Soft Processor. eASIC and Gaisler Research migrated the LEON3 processor to eASIC’s Nextreme family of zero mask-charge ASIC devices and achieved 235MHz performance, shattering the performance achievable using high performance FPGAs. Customers now have immediate access to the LEON3 processor and GRLIB IP library for implementing single chip, SPARC V8 architecture compliant, embedded systems using Nextreme devices.
LEON3 complements eASIC’s embedded processor portfolio which already includes processors from ARM and Tensilica. The addition of LEON3 enables eASIC to extend the market penetration of its zero mask-charge ASICs into the SPARC V8 community. Being SPARC V8 conformant, existing compilers and kernels for SPARC V8 can be used with LEON3 to facilitate rapid development of applications.
“eASIC’s Nextreme offers our customers with a path to higher performance and lower cost than our FPGA implementations which max out at around 125MHz on high-end FPGAs.” said Per Danielsson, CEO Gaisler Research AB. “We were surprised with how quick we were able to implement our design onto Nextreme and are very excited that we can now offer our customers a fast path to high volume production using eASIC’s zero mask-charge ASIC’s.”
“Our collaboration with Gaisler Research AB has allowed us to validate the implementation and the high performance of the LEON3 processor” said Jasbinder Bhoot, Senior director of Marketing at eASIC Corporation. “Our strategy is not to tie system architects into a proprietary FPGA processors, instead we want our customers to be able to choose the right processor for their applications.” added Bhoot.
Pricing and Availability
The LEON3 processor is available immediately from Gaisler Research. The processor can be implemented in eASIC’s smallest zero mask-charge ASIC – NX750LP with pricing starting at $3.95 per unit in volume. Additional IP cores, comprehensive documentation and technical support are also available from Gaisler Research.
LEON3 is a synthesizable VHDL model of a 32-bit processor compliant with the SPARC V8 architecture. The LEON3 processor features a SPARC V8 instruction set with V8e extensions, an advanced 7-stage pipeline, hardware multiply, divide and MAC units and a high-performance, fully pipelined IEEE-754 floating-point unit (FPU).
eASIC is a fabless semiconductor company offering breakthrough zero mask-charge ASIC devices aimed at dramatically reducing the overall cost and time-to-production of customized semiconductor devices. Low-cost, high-performance and fast-turn ASIC and System-on-Chip designs are enabled through patented technology utilizing Via-layer customizable routing. This innovative fabric allows eASIC to offer ASICs with no mask-charges and no minimum order quantity,
Privately held eASIC Corporation is headquartered in Santa Clara, California. Investors include Khosla Ventures, Kleiner Perkins Caufield and Byers (KPCB), Crescendo Ventures, Advanced Equities Incorporated and Evergreen Partners. For more information, please visit www.eASIC.com
About Gaisler Research
Gaisler Research AB is a provider of SoC solutions for exceptionally competitive markets such as Aerospace, Military and demanding Commercial applications. Gaisler Research's products consist of user-customizable 32-bit SPARC V8 processor cores, peripheral IP-cores and associated software and development tools. Gaisler Research solutions help companies develop highly competitive customer and application-specific SoC designs. Please visit http://www.gaisler.com for more information.