New Components Include Simulator-Independent SystemC Models of PowerPC, MIPS CPUs and DesignWare Cores
MOUNTAIN VIEW, Calif. -- May 15, 2008 -- Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced the immediate availability of 30 new titles in the DesignWare® System-Level Library. The new members of the Library include high-performance transaction-level models (TLMs) for PowerPC®, MIPS, and DesignWare IP. DesignWare System-Level Library models significantly reduce the time to create virtual platforms and are written in SystemC to work in any IEEE 1666 (SystemC)-compliant simulation environment.
Virtual platforms are fast, full-function simulation models of hardware that enable development and integration of software months before hardware is available. Transaction-level models (TLM) are the basic building blocks required to build virtual platforms for early software development, hardware/software co-design, architectural exploration and system verification. The DesignWare System-Level Library is the industry's most comprehensive portfolio of tool-independent, standards-based TLMs, a primary reason that IBM selected Synopsys for distribution of its SystemC-based PowerPC models.
"Synopsys' market position in the IP space made the DesignWare System- Level Library a natural choice to distribute our processor models," said Mike McGinnis, IBM's program director for PowerPC licensing. "Open standards are crucial to enable growth of a broader system-level ecosystem, and our mutual customers will benefit from the tool-independence of our SystemC models."
The DesignWare System-Level Library now features more than 80 TLMs. New high-performance models of the PowerPC 405, 440, and 460 and MIPS 4Kc complement the Library's existing models of ARM® processors. In addition, TLMs for Synopsys' DesignWare PCI Express 2.0 and Gigabit Ethernet Media Access Controller (GMAC) join other DesignWare IP, such as USB 2.0 HS OTG, SATA AHCI and AMBA® interconnect components, in the Library. Several peripheral components include Virtual I/O capability, which allows communication over the host Ethernet or USB connection of the computer executing the virtual platform. Also included are pre-assembled models of complete PowerPC and MIPS 4Kc platforms which can be used as reference designs for driver development or as a starting point for building larger virtual platforms.
Synopsys will showcase the DesignWare System-Level Library and its Innovator virtual platform development tools as a Gold Sponsor at the upcoming Power Architecture Conference (http://www.power.org/events/powercon/) being held in Munich and Paris during May 2008. The solutions will also be exhibited at the Design Automation Conference in Anaheim in June.
"IBM's choice of the DesignWare System-Level Library as a distribution vehicle for their PowerPC models builds additional value into the Library and we look forward to including models from more partners in the future," said John Koeter, senior director of marketing for IP and Services at Synopsys. "With the upcoming ratification of the SystemC TLM-2.0 standard and our DesignWare System-Level Library's compliance with TLM-2.0, we can help to ensure model interoperability for the creation of virtual platforms to accelerate software development. It makes adopting Synopsys' broad array of popular IP titles a safe investment for our customers."
The new titles, including the instruction-accurate MIPS 4Kc and cycle- accurate PowerPC 405, 440, and 460 transaction-level models, are available now. The instruction-accurate PowerPC transaction-level models will be available in June. For more information, visit http://www.designware.com/sll.
About DesignWare IP
Synopsys offers a broad portfolio of high-quality, silicon-proven digital, mixed-signal and verification IP for system-on-chip designs. As a leading provider of connectivity IP, Synopsys delivers the industry's most complete solutions for widely used protocols such as USB, PCI Express, SATA, Ethernet and DDR. In addition to connectivity IP, Synopsys offers SystemC transaction level models to build virtual platforms for rapid, pre-silicon development of software. When combined with a robust IP development methodology, extensive investment in quality and comprehensive technical support, DesignWare IP enables designers to accelerate time-to-market and reduce integration risk. For more information on DesignWare IP, visit http://www.synopsys.com/designware.
Synopsys, Inc. (NASDAQ: SNPS) is a world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading system and semiconductor design and verification platforms, IC manufacturing and yield optimization solutions, semiconductor intellectual property and design services to the global electronics market. These solutions enable the development and production of complex integrated circuits and electronic systems. Through its comprehensive solutions, Synopsys addresses the key challenges designers and manufacturers face today, including power management, accelerated time to yield and system-to-silicon verification. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/.