Hitachi adopts Aptix methodology for design verification
HITACHI ADOPTS APTIX METHODOLOGY FOR DESIGN VERIFICATION
SAN JOSE, Calif. - February 28, 2000 - Aptix Corporation today announced that in the fourth quarter of 1999 it received a substantial purchase order from the Digital Media Systems Division of Hitachi, Ltd. in Japan to emulate complex consumer product designs. The purchase order includes the System Explorer[tm] MP4 prototyping systems and prototyping modules with Xilinx Virtex 1000 FPGAs.
"We are pleased to have Hitachi adopt our block-based verification methodology with this major purchase order," said Leif Rosqvist, chief operating officer of Aptix. "We competed heavily with mainframe ASIC emulation technology to achieve this significant win for Aptix. Our customers prefer the Aptix system block-based verification methodology because it allows them to integrate all their IP and embedded software months earlier than traditional development processes allow, typically shaving months off of development schedules."
About Aptix Corporation
Aptix Corporation's products are used to verify system and system-on-chip (SOC) designs prior to integrated circuit (IC) and board tape-out and fabrication. Aptix's products utilize the block-based verification methodology, which provides a mechanism to map and verify individual design blocks incrementally and in parallel with the design creation process. This methodology shortens the net prototype creation time of achieving real-world operation of the prototype to the few days required to map and verify the last RTL block designed. Debugging designs becomes simple because the mapping process is both under the user's interactive control and follows the natural hierarchy of the design. This also makes the tracing of design problems back to the source netlist an intuitive process.
The company is privately held and is headquartered at 2880 North First Street, San Jose, California 95134. Telephone (408) 428-6200, Fax (408) 944-0646. Visit Aptix on the Web at http://www.aptix.com.
###
System Explorer, Module Verification Platform, and MVP are trademarks of Aptix Corporation.
For More Information Contact:
Linda Lavin (Aptix Corporation) (408) 428-6226
LeAnne Frank (KVO-Public Relations Counsel) (503) 221-7403
Related News
- Hitachi Adopts Cadence AMS Model-Based Methodology and Tools for Mixed-Signal Design Verification
- Blue Pearl Adds Design Verification and Methodology Services to its Product Portfolio
- OKI IDS adopts Siemens Catapult High-Level Synthesis platform for design and verification services
- Alphawave Adopts Diakopto's PrimeX™ as Top-Level EM/IR Signoff Methodology for 5nm and 3nm Technologies
- Codasip adopts Siemens' OneSpin tools for formal verification
Breaking News
- Arm revenues up 47%; shares fall
- Sondrel awarded new Video Processor ASIC design and supply contract for a leading provider of High-Performance Video systems
- X-Silicon Announces a NEW Low-Power Open-Standard Vulkan-Enabled C-GPU™ - a RISC-V Vector CPU Infused with GPU ISA and AI/ML acceleration in a Single Processor Core
- Softbank reported to be in talks to buy Graphcore
- VESA Elevates PC and Laptop HDR Display Performance with Updated DisplayHDR Specification
Most Popular
- Synopsys Enters Definitive Agreement to Sell its Software Integrity Business to Clearlake Capital and Francisco Partners
- Fabless semiconductor startup Mindgrove launches India's first indigenously designed commercial high-performance MCU chip
- sureCore announces successful tape-out of cryogenic IP demonstrator
- Siemens delivers end-to-end silicon quality assurance for next-generation IC designs with new Solido IP Validation Suite
- Announcing Availability of Silicon-Proven 12bit 1Msps SAR ADC IP Core for Whitebox Licensing with Royalty Free
E-mail This Article | Printer-Friendly Page |