Xilinx FPGAs get CoreEl, Memec controller cores
By Michael Santarini, EE Times
February 28, 2000 (2:59 p.m. EST)
Xilinx Inc. (San Jose, Calif.) has available two high-level data link control (HDLC) controller cores from AllianceCore partners Memec Design Services and CoreEl MicroSystems for use in Xilinx's new Spartan-II FPGAs.
The HDLC protocol controller cores add to the intellectual property solutions portfolio for Spartan-II FPGAs and target networking, Internet and telecom systems such as Sonet networks, switches and routers, Xilinx said.
Memec Design Services provides a compact single-channel HDLC controller solution for the Spartan-II XC2S15 device that costs less than $4 in high volume. The companies said the core allows flexible expansion to multiple channels while still keeping the costs lower than multichannel HDLC controller application-specific standard products.
The core conforms to the ISO/IEC 3309 specs and supports full-duplex operation. It also includes 16- and 32-bit cyclic redundancy checking generation plus flag and z ero insertion and detection.
The core operates at data rates in excess of the standard 53 Mbits/second. It targets numerous applications including frame-relay switches; ISDN applications for voice, video and data transmission; the X.25 protocol applications in packet-switching networks; and high-bandwidth Internet edge routers in wide-area networks.
Meanwhile, CoreEl MicroSystems provides an HDLC controller that conforms to the RFC1619 point-to-point protocol over Sonet specification.
The solution provides a byte-wide interface to packet and physical-layer framer interfaces; supports features like packet error detection and statistics generation; and supports programmable address, control and protocol fields.
HDLC controllers are available today from Memec Design Services and CoreEl MicroSystems for Spartan-II FPGAs. The data sheets can be downloaded from the Xilinx IP Center, which serves as a resource for system-level intellectual property and services. Visit www.xilinx.com for more info.
Innovative Semiconductors Inc. (Innovative) announced it has licensed its Video Interface Port core to visual systems and 3-D graphics vendor Evans & Sutherland (E&S).
Under the contract, E&S will use Innovative's VIP core for incorporation in future E&S 3-D graphics chips.
The companies said with Innovative's VIP support, E&S will be able to design products that handle both standard-definition and high-definition TV signals for streaming media and real-time applications.
Innovative Semiconductors develops and markets Video Electronics Standards Association (VESA) VIP cores-a solution that enables semiconductor designers to dramatically cut development costs and time-to-market, Innovative said.
VIP specifies the interface between graphics controllers and video devices. The latest version, VIP2, supports applications such as HDTV while being backward-compatible.
Innovative offers a complete fa mily of VIP intellectual-property core and validation suites.
The core suites are composed of RTL synthesizable cores, a video verifier and validation suites that include the behavioral models, testbench and sample scripts. See www.isi96.com.