Sonics Bundles JEDA OCP Checker Into SonicsStudio
LOS ALTOS, Calif.-- May 27, 2008 -- Sonics, Inc. and JEDA Technologies today announced the interoperability of their products. The newly released SonicsStudio 4.8, Sonics’ SoC development tool, includes the JEDA OCPchecker, a SystemC based OCP compliance checker to pinpoints protocol violations under virtual platform simulation environments. SonicsStudio 4.8 users now have the option to turn on/off at runtime through their SonicsStudio interface.
JEDA OCPchecker has replaced in-house solutions. Since production deployment over one year ago, it has detected numerous corner case protocol violation bugs for the Sonics SystemC IP models and has saved a lot of time during platform debugging. “The bundling of Sonics’ solutions with JEDA OCPchecker is a real world example of how to address virtual platform debugging challenges posed by multi-sourced IP models and the complexity of a SoC. A high-quality ESL IP model is the foundation for a stable virtual platform,” said Eugene Zhang, president and CEO of JEDA Technologies, Inc. "We are pleased to work with Sonics to showcase this quality control methodology from IP to platform level; which results in speeding up virtual platform adoption in production environments."
“Identifying IP interface problems of various OCP device models is always a challenge and is quite resource intensive. We are delighted to have this debugging capability available to our field support team where our SystemC models are used in various system-level simulation environment,” said Dave O’Brien, VP SOC Solutions at Sonics. “JEDA OCPcheck helps detect protocol problems and reduce our support load, as well as, significantly shorten debugging cycles for our customers.”
About JEDA Technologies
JEDA Technologies provides ESL verification methodology and automation solution for IP Model and virtual platform. Our products validate, measure and ensure IP Model and platform quality, ease platform debugging and improve platform visibility. JEDA products help ESL model developers to generate quantifiable quality metric and platform users to shorten the time to reach stable virtual platform. We support C++/SystemC and TLM2 and provide tools to enable comprehensive ESL verification solutions. The company is based in Los Altos, California. For more information, please visit www.jedatechnologies.net.
About Sonics
Sonics Inc. is a premier supplier of SMART Interconnect solutions that deliver high SoC design predictability and increased design efficiency. Major semiconductor and systems companies including Broadcom, Samsung, Texas Instruments and Toshiba have applied Sonics’ SMART Interconnect solutions in leading products in the wireless, digital multimedia and communications markets. Sonics is a privately-held company funded by Cadence Design Systems, Toshiba Corporation, Samsung Ventures and venture capital firms Investar Capital, TL Ventures, Smart Technology Ventures, and Easton Hunt Capital, among others. For more information, see www.sonicsinc.com.
|
Related News
- JEDA Donates OCP Checker To OCP-IP
- Sonics Upgrades SoC Development Environment And Flagship NoC To Improve Chip Architecture Optimization And SoC Resiliency
- Sonics Upgrades Designer Productivity and Power Analysis Capabilities in Next-Generation SoC Development Environment
- Sonics Eases SoC Design Flow Integration Using Magillem IP-XACT Checker Suite
- STARC and JEDA Join Forces to Ease Adoption of OSCI TLM2.0 Standard
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |