Denali First to Release Full DDR3 DIMM IP Solution
SUNNYVALE, Calif. -- May 29, 2008 -- Denali, Inc., a world-leading provider of electronic design automation (EDA) software and intellectual property (IP), today announced the immediate availability of its Databahn(TM) DRAM memory controller and hard PHY IP with full DDR3 dual in-line memory module (DIMM) support designed for bulk-memory and caching applications, including networking, storage and personal computing. Denali announced embedded systems support for discrete DDR3 DRAM chips last year as memory vendors began offering new devices to support data rates up to 1600Mbit/s per pin. This new DDR3 DIMM offering adds unique capabilities in the memory controller and PHY IP that are needed for networking, storage and personal computing systems using DDR3 modules at data rates up to 12.8GBytes/s per DIMM.
"The DDR3 DIMM is a high-volume product used by SoC customers who require a large amount of high-bandwidth memory," remarked Brian Gardner, vice president of IP products at Denali Software. "To achieve this higher bandwidth, DDR3 DIMMs utilize a 'fly-by' architecture which requires read and write leveling and gate training capabilities to be directly implemented and managed in both the DRAM controller and the PHY. Our customers look to Denali to provide high-quality, interoperable, and configurable IP that supports the DDR3 DRAM architecture where DIMM concepts can be applied."
About Databahn Solutions
Denali's Databahn DDR DRAM solutions ensure compatibility with all the latest high-speed memory technologies as the configuration process is tightly integrated with Denali's database of memory component specifications, including all the latest SDRAM, DDR1, DDR2, DDR3, and LP-DDR devices from all major memory vendors and all vendor process nodes. Deliverables include: RTL and synthesis scripts, choice of silicon-independent DDR Soft PHY or silicon- specific DDR Hardened PHY with all common views, verification test bench, static timing analysis (STA) scripts, programmable register settings, documentation, I/O pads and packaging. Databahn controllers are compliant with all the latest memory devices. For more information about Databahn DDR DRAM solutions, visit: http://www.denali.com/dram.
About Denali Software
Denali Software, Inc., is a world-leading provider of electronic design automation (EDA) software and intellectual property (IP) for system-on-chip (SoC) design and verification. Denali delivers the industry's most trusted solutions for deploying PCI Express, NAND Flash and DDR DRAM subsystems. Developers use Denali's EDA, IP and services to reduce risk and speed time-to- market for electronic system and chip design. Denali is headquartered in Sunnyvale, California and has offices around the world to serve the global electronics industry. More information about Denali, its products and services is available at www.denali.com.
|
Related News
- GUC Announces Progress in LPDDR4 IP and Reaffirms Commitment to DIMM Application of DDR3/4
- JEDEC Announces Publication of Release 6 of the DDR3 Serial Presence Detect Standard
- VESA Enables Mobile Devices to Share Full HD Video and 3D Content on Any Display With Release of MyDP Standard
- Latest Linaro GCC Toolchain Release Supports Full Range of ARM Cortex-A Processors
- Intilop Corporation announces release of a whole new series of 4th Gen Ultra-Low latency; sub 100 ns, Full TCP Offload and UDP Offload Engines and System solutions for the entire Network Communication sector
Breaking News
- Keysight, Synopsys, and Ansys Deliver Radio Frequency Design Migration Flow to TSMC's N6RF+ Process Node
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Leveraging Cryogenics and Photonics for Quantum Computing
- Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
- Credo at TSMC 2024 North America Technology Symposium
Most Popular
- Huawei Mate 60 Pro processor made on SMIC 7nm N+2 process
- Silicon Creations Reaches Milestone of 10 Million Wafers in Production with TSMC
- GUC provides 3DIC ASIC total service package to AI/HPC/Networking customers
- Analog Bits to Demonstrate Numerous Test Chips Including Portfolio of Power Management and Embedded Clocking and High Accuracy Sensor IP in TSMC N3P Process at TSMC 2024 North America Technology Symposium
- Alphawave Semi: FY 2023 and 2024 YTD Trading Update and Notice of Results
E-mail This Article | Printer-Friendly Page |