Ultra-low power 32 kHz RC oscillator designed in GlobalFoundries 22FDX
Onespin Announces Industry's First SVA Solution for Gap-Free Verification
New, Ground-Breaking SVA Library Enables Easy Property Development Using Timing Diagrams
MUNICH, Germany and SUNNYVALE, Calif. -- June 5, 2008 -- OneSpin Solutions, an EDA company that provides innovative, highest-capacity formal verification solutions, today announced the industry’s first verification solution that features gap-free RTL verification using SystemVerilog Assertions (SVA). This solution represents a major technical breakthrough in verification technology employing standard verification languages. It leverages a new, ground-breaking SVA Timing Diagram Assertion Library, TIDAL™, that helps users easily capture timing diagrams as SVA properties. Users of OneSpin’s 360 Module Verifier (360 MV) now can employ SVA to implement the GapFreeVerification™ process that slashes verification effort and ensures highest possible verification quality. OneSpin will demonstrate the new capabilities at the Design Automation Conference, Booth #625, June 9-12, in Anaheim, Calif.
Today’s announced innovations, combined with previously announced 360 MV support for verifying assertions and high-level properties written in SVA, make 360 MV and its GapFreeVerification process the most comprehensive formal SVA verification solution on the market. This unrivaled solution reduces verification effort up to five times compared to advanced testbenches, and enables verification of designs with more than 100K lines of RTL code – making it one of the most productive and highest-capacity formal RTL verification offerings.
GapFreeVerification is the only closed-loop verification process using SVA. It guides users in verification planning, execution, debug and formal coverage analysis. Automatic gap detection identifies unverified RTL functionality as well as gaps and errors in the specification. Thus, it greatly simplifies verification planning, and eliminates the need to construct coverage models and manually analyze extensive coverage data to assess and improve verification quality. 360 MV’s automatic gap detection also is the first technology to enable integration of verification planning, execution and verification quality analysis into a closed-loop process – the key to higher productivity and highest quality in verification.
TIDAL supports 360 MV’s intuitive operation-based verification approach. It enables users to directly transcribe timing diagrams that specify the intended behavior of module-level operations into corresponding SVA properties. Users then can employ 360 MV’s automatic gap-detection to systematically find and close all gaps in the SVA property set. TIDAL’s constructs, modeled in standard SVA, allow users to leverage the familiar concept of timing diagrams for formal verification, speeding learning and adoption by novices and formal experts.
Peter Feist, president and CEO of OneSpin, said, “Our customers requested a verification process that features automatic gap detection for SystemVerilog Assertions. We are now offering the industry’s first SVA solution for gap-free verification through a combination of our new TIDAL library and the SVA-enabled GapFreeVerification process for 360 MV. It sets unprecedented benchmarks for productivity, applicability and capacity in SVA-based formal verification, and ensures the highest possible verification quality.”
We are now offering the industry’s first SVA solution for gap-free verification through a combination of our new TIDAL library and SVA-enabled 360 MV.
Pricing and Availability
SVA-based GapFreeVerification™ and TIDAL™ are included at no extra charge in the version 5.0 release of 360 MV, available at the end of this month.
About OneSpin Solutions
Electronic Design Automation (EDA) company OneSpin Solutions delivers innovative, highest capacity formal verification solutions that ease and speed functional verification of complex digital designs. Market-leading telecommunications, automotive, consumer electronics, and embedded systems companies rely on OneSpin's products to achieve highest possible verification quality, while slashing verification effort. For further information please visit http://www.onespin-solutions.com/ or email info@onespin-solutions.com
|
Related News
- Clue Technologies adopts OneSpin's verification solution for avionic computing systems
- OneSpin Solutions' Formal Verification Software Enables Maxim Integrated to Identify SoC Design Issues Early in the Project Cycle
- OneSpin's New Debug Automation Technology Boosts Formal Assertion-Based Verification Productivity
- Tieto Signs Long-Term Agreement to Deploy OneSpin Solutions' Formal Assertion-Based Verification Solution
- OneSpin Enhanced 360 Module Verifier Delivers Industry's Firt Complete Multi-Configuration IP Verification Solution
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |