June 6, 2008 -
- As the interest in HDL Design House verification IP library, SoCVerify Kit continually grows, HDL Design House has signed on with a new representative to further expand and support the use of numerous verification IP from its SoCVerify Kit. The Western Europe representative of HDL Design House IP products and design and verification services is EDA4YOU, Karlsruhe, Germany. Companies from Germany, Austria, France, UK, Ireland, Switzerland, Belgium, and the Netherlands can contact Mr Hans Hartmann – email@example.com and receive more information about HDL Design House design and verification services for SoC/ASIC projects and verification IP.
SoCVerify Kit consists of competitively priced verification IP that cover a large number of standards and protocols such as: I2C, HyperTransport, Serial RapidIO, SATA, ATA/ATAPI, SAS, LPC, PCI, PCI-X, SPI4, SMBUS, and PMBUS. It supports verification methodologies eRM, URM and OVM. SoCVerify Kit offers a multi-language verification IP environment and a smooth transition to advanced verification methodologies.
* OVM Ready UVC ** SV interface availableAbout EDA4YOU:
EDA4YOU is Sales Representative organization located in Germany/Europe and focused to assist in marketing & sales of products needed for electronic design such as ASIC-Prototyping, Design-Services, EDA-Software related to IC- and PCB-Design, IP-Cores. About HDL Design House:
HDL Design House specializes in rendering design and verification services for SoC projects and providing soft IP cores and verification IP (VIP) based on advanced verification methodologies such as OVM and URM. With primary focus on fulfilling each customer's unique requirements, HDL Design House can offer design and verification services for SoC projects. In order to meet requirements of the most complex projects, HDL Design House creates dedicated engineering teams who also provide support and maintenance for VIP. The company's high-quality and verification IP (VIP) can be easily integrated to rapidly create sophisticated verification environments for complex SoCs. The VIP program is built around advanced verification methodologies (OVM, URM) and languages (System Verilog, e). HDL Design House delivers high quality VIP with rigorous QC procedures and helps customers develop their projects by combining design and verification services and VIP library, called SoCVerify Kit, with unified organization, implementation and supported verification methodologies. Further more, all verification IP from SoCVerify Kit can be used and evaluated with HDL Design House Extended Evaluation Program (EEP). This program allows eligible customers to evaluate VIP from SoCVerify Kit for three months at no charge. The company also delivers component (VITAL) models for major SoC product developers. Having developed more than 400 VHDL VITAL models for major memory provider companies, HDL Design House has established a reputation as a market leader in VHDL/Verilog/System Verilog modeling. For additional information, please visit www.hdl-dh.com