TurboConcept Optimizes its 3GPP-LTE Turbo Decoder IP Core for LatticeSC/M and LatticeECP2/M FPGA Devices
HILLSBORO, OR – JUNE 9, 2008 – Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced the availability of a 3GPP-Long-Term Evolution (LTE) Convolutional Turbo Code (CTC) Decoder intellectual property (IP) core from TurboConcept, a member of the ispLeverCORE™ Connection IP partners program. Through the program, Lattice and TurboConcept will provide complete system solutions for their mutual wireless customers who are integrating system-level IP with the most advanced FPGA silicon architectures. The ispLeverCORE Connection program allows customers to access and integrate approved third-party IP products easily into Lattice programmable devices. The IP core is available now, targeted for the LatticeSC™ and LatticeSCM™ (collectively, “LatticeSC/M”) as well as the LatticeECP2™ and LatticeECP2M™ (collectively, “LatticeECP2/M”) devices.
“The broadband wireless access market continues to gain momentum. FPGAs are a great match for this growing market because they allow quick turnaround of software changes, as well as the ability to upgrade easily as standards evolve. For FPGAs to be successful in this market, they must perform CTC decoding,” said Stan Kopec, Lattice corporate vice president of marketing. “Lattice is pleased to expand its presence in broadband wireless access with our IP partner, TurboConcept. TurboConcept’s expertise in providing Turbo Code IP, coupled with our innovative FPGA solutions, will provide our customers with a powerful solution to address their design needs.”
“Our 3GPP-LTE is a scalable, high performance IP core for the wireless market, and one of the most efficient implementations of this IP available. We are excited to combine the benefits of our IP core with Lattice’s innovative FPGA solutions,” said Jacky Tousch, TurboConcept’s co-founder and CTO.
IP Cores from TurboConcept
TurboConcept has ported, optimized and tested the TC7000 - LTE, supporting all turbo code modes specified in the 3GPP–Long Term Evolution physical layer. The core is available with several distinct throughputs, ranging from 40 to 150+ Mbits/s payload bit rate.
This core is available now for the LatticeSC/M and LatticeECP2/M FPGA devices in netlist format for immediate purchase from TurboConcept. Customers should contact TurboConcept for pricing. TurboConcept also offers a variety of additional packaging and licensing options to suit specific customer needs. By leveraging partner IP products, customers can quickly implement a wide variety of functions in Lattice programmable devices.
TurboConcept is a leading provider of IP for turbo codes and related techniques. Today, TurboConcept has a large catalogue of CTC, TPC and LDPC products for DVB-RCS, DVB-S2, VSAT, WiMAX, CCSDS and other applications. TurboConcept’s customer base is steadily expanding, with more than 50 Core License Agreements registered so far. For more information, visit www.turboconcept.com or contact: firstname.lastname@example.org, tel: +33 298 056 381.
About Lattice Semiconductor
Lattice Semiconductor Corporation provides the industry's broadest range of Programmable Logic Devices (PLD), including Field Programmable Gate Arrays ( FPGA), Complex Programmable Logic Devices (CPLD), Mixed-Signal Power Management and Clock Generation Devices, and industry-leading SERDES products.
Lattice continues to deliver "More of the Best" to its customers with comprehensive solutions for system design, including an unequaled portfolio of high-performance, non-volatile, and low-cost FPGAs.
Lattice products are sold worldwide through an extensive network of independent sales representatives and distributors, primarily to OEM customers in communications, computing, industrial, consumer, automotive, medical and military end markets. For more information, visit http://www.latticesemi.com.