by Peter Clarke - EETimes
LONDON, Dec. 17, 2015 –
French research institute CEA-Leti has reported on two techniques to put local strain in the silicon channel of a fully-depleted silicon-on-insulator (FDSOI) manufacturing process.
STMicroelectronics and Globalfoundries are championing the FDSOI process as a means to achieve world-class energy efficiency in leading edge integrated circuits without the complexity and expense of FinFET manufacturing.