Dual Port Register File Compiler (1 Read-Only Port, 1 Write-Only Port)
Comsis introduce the MimoKit-MAX FPGA platform
The analog block consists of 3 IQ codecs which perform the conversions between the digital and analog domains. Each IQ codec contains two matched 80 Msps 10-bit ADCs, and two matched 80 Msps 10-bit DACs. The digital side of the codec’s bank is connected to an FPGA, while the analog side carries the differential signals to the radio transceivers.
The radio block consists of three 2.4GHz/5GHz dual-band radio transceivers. As the MIMO operation requires the same frequency for all the transceivers, they share a local oscillator reference.
Feature set:
- Two Altera Stratix II devices cumulating more than 3 million ASIC gates equivalent
- 500 FPGA-FPGA connections, including 64 LVDS pairs
- 32 Mbits Flash for code or data storage
- 512 Mbits SDRAM
- Two Gigabit Ethernet PHY transceivers
- PCI interface
- Two USB2 High-speed transceivers, one host and one device
- Two RS232 level shifters
- Three AD9861 IQ codecs for baseband conversion
- MIMO-compatible RF transceivers for configurations up to 3Tx3R
- Supported by the GRLib/Leon3 IP library from Gaisler Research. This is a comprehensive IP library of a Linux-capable 32-bit embedded processor and peripherals
- Compatible with Altera Quartus II design software
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