Siroyan to Deploy Sequence's Power Theater Tools to Optimize OneDSP Cores for "Next-generation" Ultra-Low Power Designs

SANTA CLARA, Calif. & READING, England--(BUSINESS WIRE)--Dec. 3, 2001-- Sequence Design Inc., the SoC design closure company, today announced that it has completed a technology agreement to supply Siroyan, the high-performance DSP IP company, with its PowerTheater(TM) tools. Siroyan is one of the first companies to deploy the latest generation of the PowerTheater tool suite. Siroyan's designers will use the tools as a key element of the company's future development program, focusing on ultra-lower power and power-efficient derivatives based on its OneDSP architecture, which was announced in October this year.

A significant factor in Siroyan's decision to adopt Sequence's PowerTheater suite was its ability to provide the design teams with highly accurate RTL and architectural analysis, enabling them to address power optimization early in the design cycle -- where significant impact on the overall power can still be derived.

"Power consumption in high-end ICs and SoC designs has been roughly doubling every two years, and this problem is expanding as functionality increases," said Adrian Wise, chief technology officer at Siroyan. "The current generation of IP cores -- many of which are based on architectures that are more than 20 years old -- were never designed with today's requirements in mind. By addressing power usage at an architectural and RTL stage, we can reduce the block-level power consumption by as much as 50 percent compared with current IP designs. And that will offer huge benefits for our customers."

Actions taken to optimize power usage earlier on -- before synthesis takes place -- reaps significant rewards for a customer's System-on-Chip (SoC) design. RTL design analysis and optimization are key elements of power-efficient design. In complex ICs, typically 80 percent of the power behavior of a chip is determined before synthesis. With performance starvation and power consumption highlighted as the two most important concerns of today's SoC designers, Siroyan is again focusing on the specific requirements of the industry.

"Siroyan is an excellent example of a pioneering start-up company that recognizes that through taking power actions early in the design process, a significant return-on-investment can be achieved," said Vic Kulkarni, chief operating officer, Sequence. "Sequence is the first company to deliver power management software focused at the architectural, RTL, and gate levels. We are confident that Siroyan's choice of the PowerTheater tools will soon reap rewards. This agreement demonstrates the demand for low-power solutions."

The PowerTheater suite consists of Analyst for power analysis at the architectural level, and Designer for register transfer level (RTL) power optimization. PowerTheater-Analyst provides the opportunity to estimate full-chip power consumption and identify opportunities for power reduction at the beginning of the design process, as soon as the first RTL code is available. PowerTheater-Designer is for use prior to logic synthesis and helps users achieve significant power savings at the RTL level. Unlike automatic and inflexible power optimization, Designer acts as an advisor to the user, recommending specific RTL changes. PowerTheater-Designer's functionality covers all major types of circuitry, including control, datapath, I/O, memory and clocks.

Siroyan's OneDSP architecture is the first to combine scalable, high-performance DSP with general-purpose RISC control code in a true, single core. Delivering scalable DSP performance through the application of unique VLIW (Very Long Instruction Word) clustering techniques, OneDSP delivers the next-generation processing power for SoC designers working on demanding convergent communications and consumer applications. Providing up to 32 execution-unit clusters to be implemented by the licensee, it enables the designer to select the performance, cost and power consumption parameters that are best suited to each design. OneDSP is deployed in a family of synthesizable cores, the first of which is the SRA328.

About Sequence

Sequence Design, Inc., the SoC Design Closure Company(SM), enables system-on-chip designers to bring higher-performance and lower-power integrated circuits quickly to tapeout. Sequence's physical design software and solutions give its more than 100 customers the competitive advantage they need to excel in aggressive technology markets, despite demanding complexity and time-to-market issues of sub-180 nanometer design.

Sequence has worldwide development and field service operations. The company was formed through the merger of Sente, Inc., Sapphire Design Automation, Inc. and Frequency Technology. Sequence is privately held. Sequence is a member of Cadence Design Systems' Connections(TM)and Mentor Graphics' Open Door(TM) partnership programs. Additional information on the company can be found at sequencedesign.com.

About Siroyan

Siroyan Limited's vision of becoming the industry-standard DSP IP supplier began with the OneDSP program in 1999, following an intensive research study. This two-year program, involving over 800 design engineers in 150 different companies, ascertained the architecture and IP delivery model the company needed to take technology design to the next level of performance. The OneDSP architecture is the first to use VLIW clustering techniques to provide unparalleled DSP power, and integrate high-performance RISC functionality. Delivered as a family of synthesizable cores specifically for SoC deployment, and supported in a standard EDA development environment, Siroyan offers designers the performance and flexibility required for demanding next-generation applications. Headquartered in Reading, UK, the company is privately owned, and employs some 50 technical and commercial staff at its HQ and Design Centres. More information is available at: www.siroyan.com.

Note to Editors: Siroyan and the Siroyan logo are trademarks of Siroyan Limited. All other company or product names are the registered trademarks or trademarks of their respective holders.