Enhanced design offers high performance, low latency and scalabilitySAN JOSE, Calif. -- Sept. 3, 2008
-- In the emerging market of wireless base stations Serial RIO is becoming a natural choice as embedded DSP processors used in these designs offer faster speeds and increased performance. The market for SRIO chip interconnectivity is expected to double by the end of 2008. AXI Bridge was added to GDA's GRIO Serial RIO IP and to enhance designs demanding high performance, low latency, low pin count, reliability and scalability. Customers are designing SOC products with increased complexity of algorithms with this IP.
Ravi Thummarukudy, VP and General Manager of IC and IP division at GDA, in a statement said, "We have been very strongly associated with Rapid IO development community with providing Rapid IO design IP and design services to our customers as well as supporting the RapidIO Trade Association's (RTA) BFM development, enhancement and support for the past four years. With the recent addition of feature-rich AXI Bridge to the native RapidIO core, our customers are able to speed up their development cycle to get RapidIO solutions to the market." Thummarukudy added: "AXI Bridge is exhaustive in its features supporting Message passing, DMA and Logical Flow control. It confirms our continued leadership and commitment to Serial RapidIO and serial interconnect technologies in general."
Compliant with RapidIO specification - Revision 1.3, GRIO supports 1.25/2.5/3.125 Gbps line rates and has seen implementations in multiple silicon technology including 65nm. These applications require high performance bus architecture like AXI in the system. These requirements demand AXI based interface to be offered by interconnect IP such as GRIO as a drop-in solution without any loss of performance and functionality. To offer a drop-in solution for these AXI-based designs, GDA added highly configurable and scalable AXI Bridge solution with DMA, Flow Control and Mailbox capability to its Native GRIO Core. Previous and ongoing designs using GRIO are in wireless base stations infrastructure but with the availability of the highly configurable AXI-based Rapid IO solution from GDA, future designs on the Customer Premise Equipment (CPE) side of wireless infrastructure are also expected to benefit from it.
Serial Rapid IO with AXI Bridge Controller core is immediately available for customer implementations. About GDA Technologies:
GDA Technologies is a leading Electronic Design Services (EDS) and Silicon Intellectual Property (SIP) solution provider for the Embedded, Networking, and Consumer Electronics Market. GDA is part of the L&T Infotech Product Engineering Services (PES) offering which aims to provide end-to-end product design capability to its customers. GDA is headquartered in San Jose, CA with satellite design centers in Boston, Sacramento, Chennai, Kochi, and Bangalore.
GDA has developed many high-performance IP cores for computer and networking interfaces, including HyperTransport, 10 Gigabit Ethernet MAC, and SPI4.2. Additionally, GDA designs systems, boards, SoC's, ASIC's, and FPGA's from concept to product levels. The company has successfully developed IPs and products in the areas of high-speed handheld embedded solutions, digital video applications, Internet appliances, voice and data networking applications, and non-form factor PC architectures. For more information, visit http://www.gdatech.com/IP.shtml