STARC Selects Verisity's e Verification Language for IP Reuse --> "Arial,Helvetica" size=-1 > Headline News
STARC Selects Verisity's e Verification Language for IP Reuse
Semiconductor Technology Academic Research Center -STARC- Selects Market-Proven Verification Language
MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Dec. 3, 2001--Verisity, Ltd. (Nasdaq:VRST - news), the leading provider of functional verification automation tools, and the Semiconductor Technology Academic Research Center (STARC), today announced that STARC has selected Verisity's e verification language for IP reuse. STARC is a semiconductor industry association in Japan that is developing new semiconductor technologies through cooperation between the industry and academia. The IP Reuse Technology Committee selected e for protocol definition and verification of IP compliance to these protocols. STARC member companies include Fujitsu, Hitachi, Matsushita, Mitsubishi, NEC, OKI, Rohm, Sanyo, Sharp, Sony and Toshiba.
"We have chosen Verisity's e verification language for the verification language on which next generation IP will be based," said Tadahiko Nakamura, Senior Manager, IP Reuse Group, for STARC. "We chose e after careful evaluation of several offerings, and e was the best fit for STARC's requirements. We are pleased to have Verisity and the e language be an important part of our development."
STARC will use the temporal portion of the e language as the Interface Specification Description Language for IP reuse. STARC will also promote e to be an open industry standard, and is planning to build an open library, which contains general property descriptions such as PCI bus protocol monitor using the Interface Specification Description Language to make IP integration easier.
"STARC fosters the standardization of advanced methodologies, which has significant impact not just in Japan, but worldwide," said Yaron Kashai, vice president of research and strategic technologies for Verisity Design. "Our verification methodologies uniquely enable verification reuse and STARC's endorsement of the e language is a strong validation."
About Verisity
Verisity is the leading provider of proprietary technologies and software products used to efficiently verify designs of electronic systems and complex integrated circuits that are essential to the communications and other high growth segments of the electronics industry. Verisity's products automate the process of detecting flaws in these designs, enabling customers to deliver higher quality products, accelerate time-to-market and reduce overall product development costs.
Verisity Design, Inc.'s principal executive offices are located in Mountain View, CA. Verisity's principal research and development offices and the corporate headquarters of Verisity Ltd. are located in Rosh Ha'ain, Israel. For more information, see Verisity's web site at www.verisity.com.
About STARC
STARC was founded by Japan's leading eleven semiconductor manufacturers in December 1995 to foster collaboration between the semiconductor industry and the academic world in Japan. The founders are Fujitsu , Hitachi, Matsushita Electrical Industrial, Mitsubishi Electric, NEC, Oki Electric Industry, Rohm, Sanyo Electric, Sharp, Sony and Toshiba Corp.
By establishing a close working relationship among the members, STARC aims to strengthen Japan's fundamental R&D power for semiconductors, thus enabling the Japanese semiconductor industry to increase its competitive edge worldwide.
Verisity is a registered trademark of Verisity Design, Inc. All other trademarks are the property of their respective holders.
Contact:
Verisity Design, Inc.
Jennifer Bilsey, 650/934-6823
jen@verisity.com
Related News
- Verisity's Specman Elite Version 4.1 Boosts Verification Reuse
- Verisity Announces E Reuse Methodology 'eRM' for Reusable, High-quality, Verification Component Development; eRM Boosts Productivity and Ensures Interoperability for All eVCs
- Key Endorsements from Industry Leaders Drive Verisity's e Verification Language to Standardization
- Averant, Inc. Licenses Verisity's e Verification Language
- Europe Technologies Selects Verisity's e Verification Language For IP Verification; Europe Technologies Selects Market-Proven Verification Language
Breaking News
- Thalia's AMALIA 24.2 introduces pioneering estimated parasitics feature to reduce PEX iterations by at least 30%
- TSMC plans 1.6nm process for 2026
- Qualitas Semiconductor Partners with TUV Rheinland Korea to Enhance ISO 26262 Functional Safety Management System
- M31 has successfully launched MIPI C/D PHY Combo IP on the advanced TSMC 5nm process
- Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development
Most Popular
- Controversial former Arm China CEO founds RISC-V chip startup
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes
- Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
E-mail This Article | Printer-Friendly Page |