The eDRAM IP offering by ATMOS includes standard and customizable cores (soft macros) and an eDRAM compiler. Development of both was achieved by incorporating ATMOS' silicon proven DRAM designs and software expertise with TSMC's experience in combining high-performance logic and DRAM processes.
ATMOS Corporation President, Dr. C. Paul Slaby said, " The inaugural design targeted for TSMC's 0.18 micrometer process will empower system developers, allowing them to incorporate custom eDRAM blocks into SoC implementations quickly and efficiently, shaving months off the traditional memory design time."
" The critical factor of SoC design success is higher performance which is provided by TSMC's logic-based embedded DRAM technology and convenience of design provided by ATMOS' eDRAM compiler. Therefore, collaboration with ATMOS provides our customers with a complete eDRAM answer for SoC design," said David Sheng, Director of embedded DRAM Marketing at TSMC.
" The research and development effort extended by ATMOS and TSMC is a testimony to our mutual commitment to the success of the 0.18-micrometer eDRAM program and beyond," said Jerry Kavoun, Director of Business Development at ATMOS. He adds, "We will continue to provide our customers with enabling technologies to increase design performance and efficiency, thus providing additional competitive edge to their products."
| Eryn Brooks Public Relations eryn@atmos-semi.com ATMOS Corporation (613) 591-7742 | or | Jerry Kavoun Director of Business Development |